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This paper describes two novel sub-32 nm current (CSA) and voltage (VSA) sense amplifiers in fully depleted (FD) double-gate (DG) silicon-on-insulator (SOI) technology with planar independent self-aligned gates. The proposed sense amplifiers (SA) need 40% to 4 times less power, achieve a 10-15% increase in speed and have a 2.5 to 3.5 times larger tolerance to Vth and L mismatch compared to published...
In all of th seven main memory components, the use of the novel SOI-specific sense amplifiers, memory-cells, and logic gates, envinced exceptionally speedy operations. This made possible fabrication and tests of complete memories which feature 2.2 GHz operational speed, 10-12 error/bit/day and 1 Mrad total dose hardness. The SOI memories can indeed provide substantially faster operations than their...
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