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Since nitrided oxides improve gate leakage at the expense of NBTI, one must optimize nitrogen concentration in oxinitride samples for reliable performance and reduced power dissipation. Here, we analyze wide range of NBTI stress data to develop a predictive model for gate leakage and first self-consistent model for field acceleration within R-D framework. This model anticipates a novel design diagram...
SRAMs are an integral part of system on chip devices. With transistor and gate length scaling to 65nm/45nm nodes, SRAM stability across the product's lifetime has become a challenge. Negative bias temperature instability, defects, or other phenomena that may manifest itself as a transistor threshold voltage (VT) increase can result in VMIN drift of SRAM memory cells through burn-in and/or operation...
The paper presents a comprehensive study of the impact of NBTI on SRAM Vccmin stability. The authors describe a novel simulation technique to predict the between - die statistical distribution of Vccmin drift due to NBTI. While the drift is a fundamental phenomenon, it was shown that by cell design and transistor process optimization, the drift can be reduced to tolerable levels
Highly reliable characterization of fast transient in NBTI is achieved by performing initial and stressed I-V measurements in ultra-short time (100 ns). We further provide evidences that reaction-diffusion (R-D) model can not explain the fast transient in NBTI, while hole trapping (HT) model explains all experimental observations. We also establish that previous on-the-fly methods are sound except...
We describe on-chip circuits specially designed and fabricated for the purpose of measuring the effect of AC NBTI on an individual, well-defined device in the wide frequency range on a single wafer. The circuits are designed to allow measurements in multiple modes, specifically, DC and AC NBTI (both interrupted and on-the-fly), on a single pFET and on a CMOS inverter, as well as charge-pumping characterization...
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