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Technology and characteristics of 8-mega density CMOS image sensor (CIS) with unit pixel size of 1.75times1.75mum2 are introduced. With recessed transfer gate (RTG) structure and other sophisticated process/device technology, remarkably enhanced saturation capacity and ultra-low dark current have been obtained, which satisfy the requirements of high density digital still camera (DSC) application
Hybrid and monolithic thinned backside illuminated CMOS imagers operating at full depletion at low substrate voltages were developed. The combination of a 50 mum EPI layer with varying doping concentration and trenches to reduce crosstalk is unique. All thin wafer processing is performed on 200 mm wafers using a specially developed temporary carrier process. As a result, working imagers exhibiting...
An innovative process development for sub-2μm CMOS imager sensors is described, leading to tremendous improvements on main pixel parameters like conversion gain, saturation charge, sensitivity, dark current and noise, A full 3MP demonstrator with 1.75μ pixel pitch and 1.45μm pixel pitch have been successfully designed, fabricated and characterized
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