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A 32-b very-long-instruction-word (VLIW) chip fabricated in a double-metal 1.5- mu m CMOS process using e-beam direct-write-on-wafer lithography is discussed. The chip contains 77 K transistors on 78 mm/sup 2/. It is dedicated to running scalar integer applications. The chip consists of several independent functional units controlled on a cycle-by-cycle basis by a 200-b instruction. All units are...
A 1.2-million transistor, 33-MHz, 20-b dictionary search processor (DISP) design that makes it practical to construct a 50000-word dictionary search system using only 20 DISPs is discussed. Special features of the DISP are (1) an architecture that drastically increases capacity of the content addressable memory (CAM), which handles high-speed character searches; (2) logic that increases the speed...
A 36-b (32-b words with byte parity) by 32-word triple-ported register file designed to be used as a macrocell in an emitter-coupled-logic (ECL) reduced-instruction-set-computer (RISC) microprocessor is discussed. The goal was to produce a dense, low-power design, since the floating-point coprocessor requires two register files. The chips are fabricated using a 2- mu m, triple-implanted, three-level...
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