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The globalization of integrated circuit (IC) supply chain and the emergence of threats, such as intellectual property (IP) piracy, reverse engineering, and hardware Trojans, have forced semiconductor companies to revisit the trust in the supply chain. Logic locking is emerging as a popular and effective countermeasure against these threats. Over the years, multiple logic techniques have been developed...
Although FPGA based implementation of software can give us not only higher performance but also energy efficient computing, efficient implementation algorithms as hardware and as software can be significantly different. Typical high-level synthesis methods may not concentrate on this issue, as they are targeting general hardware designs. In this paper performance directed synthesis targeting throughput...
This paper presents a dual loop Clock and Data Recovery (CDR) circuit for high-end, low data rate, wireless transfer (100–200kb/s). Firstly, design tradeoffs for the single loop variant of the CDR are formulated which include jitter transfer (JT) function in frequency domain and long term jitter in time domain. These design rules are then used for the realization of a dual loop CDR consisting of tristate...
Secure Multi-party Computation (SMC) protocols enable two or more parties to compute collaboratively generic functions while keeping secret their inputs, sharing only the final result. To achieve this goal, a technique relying on the design of Garbled Circuits (GC) has been firstly proposed by Yao. Garbled circuits are Boolean circuits that can be evaluated using a distributed protocol for computing...
Stochastic computing (SC) is a promising technique to enhance computing efficiency in terms of area, power, and error tolerance with slight compromise of the accuracy. This paper presents a novel approach to automatic synthesis of an SC circuit from a given arithmetic expression with multiple variables. It first extracts building blocks called iSC kernels from the given expressions and then synthesizes...
The authentication of flight data in Unmanned Aerial Vehicles (UAVs) is highly critical because processing fake commands by the on-board flight controller can cause fatal consequences. Depending on the criticality level of the UAV mission, multi-layer authentication techniques can be useful to assure higher security levels. This paper proposes a technique for continuous authentication of flight data...
Vertical Nanowire-FET (VNFET) is a promising candidate to succeed in industry mainstream due to its superior suppression of short-channel-effects and area efficiency. However, to design logic gates, CMOS is not an appropriate solution due to the process incompatibility with VNFET, which creates a technical challenge for mass production. In this work, we propose a novel VNFET-based logic design, called...
In this paper, a low power, programmable bias inverter quantizer (BIQ) flash ADC for communication and biopotential signal processing applications is presented. The comparator of the proposed BIQ flash ADC is designed by using the digital inverter with cascode PMOS and NMOS bias transistors in the top and bottom. The voltage range of the bias transistors will control different switching threshold...
Drastic growth in design complexity of VLSI circuits has increased the chances of bugs escaping to first released silicon. This has resulted in an increased emphasis on post-silicon validation and debug which is typically hindered by limited observability of internal signals. Trace buffers assist in curbing this bottleneck by storing selected signal states for limited clock cycles. For efficient use...
Operating MEMS capacitive sensors in negative feedback mode results in improved bandwidth, and lower sensitivity to process and temperature variation. Feedback operation is achieved by applying a feedback voltage to the actuation electrodes of the sensor, generating a corresponding feedback-force on the sensor proof mass. To overcome, the non-linearity of the quadratic voltage-to-force relation in...
Neurodegenerative disorders (NDDs) are chronic diseases of the human central nervous system that cause degradation in mobility and cognitive functioning. Continuous assessment of gait for patients with NDDs is a crucial element of future care and treatment. This paper presents a wearable NDD detection system that monitors the person's gait and infers 3 key gait features: stride time, its fluctuation...
Razor is a milestone in the field of Error Detection&Correction strategies for low-power operation. Despite the impressive level of maturity, its application on circuits other than pipelined processors still remains an open issue. Firstly, the error detection mechanism relies on special flip-flops (FFs), the Razor-FFs, whose use imposes heavy hold-time fixing and large circuit area/power overheads;...
Level shifters to convert signal swings from low-voltage (VDDL) to high-voltage (VDDH) are required at the boundary of voltage domains in SoC employing multiple supply voltages. However, they cost delay, power and area in addition to increasing the complexity of physical design. This paper proposes a level-shifter-less (LSL) approach to use a reverse body bias (RBB) in the VDDH domain and superior...
While throughput has for a long time been the main focus of optimisation, the need for compact and lightweight implementations of cryptographic primitives is on the rise again. Along with development of new tailored primitives and standards, the search for small implementations of the Advanced Encryption Standard has gained momentum again. This culminated in the recent publication of the AtomicAES...
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