The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.
This talk will focus on an IoT Systems-on-Chip (SoCs) presented as an example of IoT work in the UAE and as part of the UAE SRC (Semiconductor Research Corp) Center of Excellence on Energy Efficient Electronic Systems (aka ACE4S http://www.src.org/program/grc/ace4s/) involving researchers from 5 UAE Universities looking at developing new technologies aiming at innovative self-powered wireless sensing...
In this paper, a heterogeneous interconnect stitching technology (HIST) is presented. Stitch chips with high-density fine pitch wires are used to connect active dice of various functions in a manner that mimics system-on-chip (SoC) like performance. Microbumps and compressible microinterconnects (CMIs) are used to provide die-to-die and die-to-package interconnection. A testbed containing two dummy...
A bio-potential amplifier intended for continuous monitoring of vitals characterized by its long operational lifetime is required to operate at the lowest power budget possible. Moreover, a compact active area directly related to portability is essential. This paper presents a 0.55pW auto gain controlled biopotential amplifier implemented in 65nm 1P7M CMOS for ECG signal classifier SoC. A chopper-stabilized...
This paper presents a 2×VDD-enabled fully-integrated CMOS low-dropout (LDO) regulator with fast transient response for cost-effective SoC power management applications with elevated-VDD supply. All the MOS transistors used in the proposed LDO regulator are low voltage (LV) MOSFETs, hence saving the high-voltage devices fabrication cost required in a conventional design. Two LV power transistors are...
The Internet of Things (IoT) is an extremely fragmented market and can be defined as anything from sensors to small servers. It is estimated that over 30 billion IoT devices will ship by 2020. The ability to sense countless amounts of information that communicates to the cloud is driving innovation into IoT applications, such as in wearable devices (for health, fitness or infotainment applications)...
Building the behavioral model for each analog circuit is an efficient approach for mixed-signal system verification. If an automatic model generator is available, it is useful for designers to reduce the extra efforts. Instead of modeling the relationship between circuit inputs and outputs directly, a divide and conquer approach is proposed in [8] to divide the circuit into several small building...
A sub-1 V and ultra-low power consumption voltage reference has been implemented in a standard 0.18μm CMOS process, without using resistors and special threshold voltage devices. A temperature coefficient (TC) of 37.8 ppm/°C in a temperature range of −40°C∼60°C is achieved. The supply voltage ranges from 1 V to 3 V, and the line sensitivity (LS) is 0.02%/V. When Vdd is minimum, the supply current...
Secure Multi-party Computation (SMC) protocols enable two or more parties to compute collaboratively generic functions while keeping secret their inputs, sharing only the final result. To achieve this goal, a technique relying on the design of Garbled Circuits (GC) has been firstly proposed by Yao. Garbled circuits are Boolean circuits that can be evaluated using a distributed protocol for computing...
Constant technological advancements in commercial multirotor unmanned aerial vehicles (drones) resulted in their deployment in more and more applications, ranging from entertainment to disaster management and many more domains. However, in contrast to their powerful and diverse entrance into our lifestyle and society, they do not yet provide sufficient intrinsic fail-safe mechanisms to prevent accidents...
The growing impact of the network on the overall power consumption of many-core systems introduces a need for mechanisms that reduce the power required for data communication without significantly impacting performance. This paper proposes a low-overhead mechanism for frequency control of individual channels in a Network-on-Chip system. The proposed mechanism is low-overhead, distributed and easy...
Near real-time periodic tasks, which are popular in multimedia streaming applications, have deadline periods that are longer than the input intervals thanks to buffering. For such applications, the conventional frame-based scheduling cannot realize optimal scheduling due to their shortsighted deadline assumption. To realize globally energy-efficient executions of these applications, we propose a novel...
Non-volatile memory (NVM)-based FPGAs are expected to replace traditional SRAM-based FPGAs to achieve higher scalability, lower leakage power, and better reliability. In NVM-based FPGAs, dynamic power is the dominant power factor, and flip-flops exhibit the most intensive switching activities. While flip-flops can be implemented with NVM elements such as Magnetic Tunnel Junctions (MTJ), NVM cells...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.