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In millimeter-wave communication systems, generating high output power with high efficiency on the transmitter side is one major challenge. In this paper, a symbol-based outphasing power combining solution has been demonstrated with data rate up to 8 Gbps at an RF frequency of 83.5 GHz. This solution provides 2 dB higher output power compared to the power of two QAM signals at 12% EVM.
This paper presents a 300 GHz single varactor doubler suitable for ultrahigh-speed wireless communications. The proposed varactor doubler realized in TSMC 40 nm CMOS can be integrated with other CMOS components to generate millimetter-wave signals at 300 GHz frequency band. At the pumping frequency of 150 GHz, input power of 10 dBm, the doubler results in an output power of −3.5 dBm at 300 GHz. The...
This manuscript describes a 34–42GHz single-sideband 90nm-CMOS transmitter where PLL has been integrated into the LO chain and, with I/Q input and two-stage up-conversion, a 30dB image-rejection ratio is achieved within the intended bandwidth. This transmitter's wideband tuning range is made possible by the use of additional capacitor on the VCO, and the phase noise of the resulting RF output is in...
A 60GHz integrated antenna switching architecture is presented for millimeter-wave transceiver system. This circuit topology re-uses the last stage's transistor of power amplifier (PA) and the first stage's transistor of low-noise amplifier (LNA) as the switching elements, and the matching blocks for PA and LNA. A two-stage LNA and a two-stage PA integrated together as antenna switch is fabricated...
We present a 28-GHz low-noise amplifier (LNA) using 0.15-um InGaAs pHEMT enhancement-mode (E-mode) technology. The 28-GHz LNA exhibits a gain of 22.2 dB and a 3-dB bandwidth of 14.1 GHz (22.7–36.8 GHz) under 3-V supply with 38.5-mA current consumption. The simulation results of the LNA show a noise figure (NF) of 2.13 dB and a P1dB of 10.8 dBm. The chip size is 1488 um × 796 um.
This paper presents a differential W-band power amplifier combined with LC balun in a commercial 0.13 μm SiGe BiCMOS technology. The proposed amplifier consists of one cascode stage and two common-emitter stages. In the cascode stage, the bypass capacitor at the base node of the upper transistor, which is sensitive to the amplifier stability, is analyzed. Measured gain of over 15 dB is achieved from...
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