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A 60GHz up-conversion mixer with wide IF conversion bandwidth and high linearity for wireless transmitter is reported in this paper. The proposed double balanced Gilbert-cell type mixer adopts resistive feedback network and inter-stage inductor to improve the performance of mixer. The OP1dB is improved by lowering the threshold voltage of MOSs at the Gm stage. Implemented in 65nm CMOS, the proposed...
This paper presents the design of multi-band millimeter-wave (mmW) phased-array communication systems for wideband applications. A multi-band matching network (MN) design is proposed using a novel low-loss reconfigurable-inductor (RI). Furthermore, a reconfigurable-transformer (RT) is shown for an accurate neutralization of the gate-drain capacitance (Cgd), which improves the efficiency and stability...
In this paper, a sub-terahertz full-duplex wireless communication system-on-board is described, which can support bi-directional communication with data rate up to 400 Gbps. This is achieved by 16 channels of transceiver system. Each channel consists of four transmitters (TXs) and four receivers (RXs), and 2×2 arrayed antennas to allow 2D beamforming for spatial multiplexing. The range of the board-to-board...
This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, fmax. Both low power consumption and high conversion gain are achieved using a high-performance tripler-last multiplier combined with a downconversion mixer. Its conversion gain and 3-dB bandwidth are −18 dB and 33 GHz, respectively. The receiver achieves a wireless data...
A 60-GHz two-path phased-array transmitter (TX) with linearity enhancement techniques in 28nm CMOS technology is presented. The design is based on the all-RF architecture with buffer amplifiers (BA), 5-bit RF switched LC phase shifters, variable gain amplifiers (VGA), linearity enhanced power amplifiers (PA), bias circuit, serial peripheral interface (SPI). The two-way TX array achieves a 30dB gain...
L-2L de-embedding method was proved accurate at millimeter-wave (mm-wave) frequencies around 60GHz. However, it was never quantitatively compared to a more complicated method at frequencies as high as 100GHz. In this paper, L-2L and TRL de-embedding methods are compared by applying both on test structures fabricated using CMOS 65nm process. More focus will be given to the W-band frequencies by comparing...
The model for a compact bandpass filter which has multi-section structure and equivalent elements of package is proposed in this paper. With six vertical via-holes and three planar coupled lines, a multi-section coupled line is available. There are wide upper stopband and multi transmission zeros in the proposed design. This device is implemented in a low temperature co-fired ceramic substrate with...
This paper presents an enhanced identification technique for the behavioral modeling of radiofrequency power amplifiers using twin-nonlinear two-box structures. The proposed technique intentionally uses low nonlinearity order in the memoryless block and allows for performance degradation in the first box of the model. This helps reducing the coefficients dispersion of the second box, and therefore...
A 4.6-GHz Class-F−1 CMOS power amplifier implemented in 0.18-μm CMOS process for wireless applications with high output power and high efficiency is proposed. By using harmonics tuning technique and cascode devices, the proposed power amplifier achieves an output power of 27.8-dBm with power-add-efficiency (PAE) of 32% and quiescent 158-mW dc power consumption.
A differential 104 GHz amplifier has been demonstrated in 130 nm SiGe BiCMOS process. The amplifier features a 3-stage differential cascode architecture with on chip interstage matching. The amplifier's stability is improved by using transmission line inductor in the cascode structure. With stacking circuit architecture, the amplifier could tolerate up to 3 V supply voltage without reliability concern...
This article studies the RF performance of a wide locking range divide-by-3 injection-locked frequency divider (ILFD) in CMOS process. The ILFD circuit bases on MOS switch cross-coupled oscillator and uses dual-resonance RLC resonator. The power consumption of the ILFD core is 5.6 mW and the locking range is from 6.7 to 11.6 GHz (53.6%) at injection power Pinj = 0 dBm. Measured tuning range depends...
In this paper, we propose a high linearity CMOS sub-harmonic I/Q demodulator at V-band using CMOS 90 nm process. We adopt frequency doubler to double input LO frequency and use transformer to couple 2LO signal to mixer core. In addition, transformer coupling is used to replace stacked transistors to improve linearity. Cross couple pair is also utilized as active load to enhance conversion gain. The...
Recently, Wireless Power Transmission (WPT) system in accordance with Qi standards is being installed into smartphones. However, the transmission efficiency is greatly deteriorated due to adjacent metal objects. To solve those problems, it is thought that the high permeability magnetic sheet insertion method into the gap between WPT-coil and metal objects is effective. On the other hand, the high...
The wireless telecommunication environment in indoor location is adversely affected by multiplex reflection interference. The suppression of reflection interference is indispensable for the reliability improvement of the wireless network system. The ultrathin microwave absorber in consideration of indoor use is developed for reduction of the multiple reflections. Unfortunately, this absorber causes...
This paper presents a novel injection- and frequency-locked loop (IFLL) for reducing phase noise of wideband oscillators, which uses an injection-locked oscillator (ILO) to amplify and phase-shift the feedback signal in the IFLL. In this paper, the frequency domain analysis is presented to characterize the proposed IFLL and compared with the experimental results. Consequently, the oscillators that...
The authors present a straightforward and effective approach for minimizing insertion loss (IL) of varactor-based frequency-agile microstrip passive circuits, where varactors are employed as elements of variable reversal capacitances to attain reconfigurabiltiy/tunability on circuit characteristics. Technically, the proposed approach mimics the required capacitances using the varactors together with...
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