The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Conference proceedings front matter may contain various advertisements, welcome messages, committee or program information, and other miscellaneous conference information. This may in some cases also include the cover art, table of contents, copyright statements, title-page or half title-pages, blank pages, venue maps or other general information relating to the conference that was part of the original...
1/f Noise levels in Hafnium Oxide based bipolar ReRAM devices are studied using an ac + dc measurement technique. Preliminary results support the idea that the current conducts through a low resistive metal rich filament at low resistance state (LRS) and the current at high resistance state (HRS) is a trap-assisted current. The technique used here, allows to estimate the noise levels around 1 Hz.
A practical model of physically interpreting electrical responses was proposed to quantify the enhancement effects of local electrical fields along the complex poly-oxide-poly interfaces. In revealing the unique test polarity dependence of breakdown voltage and IV characteristics, the excellent agreement between TCAD simulations and measurements have fully validated the existence of locally enhanced...
Self-heating is a growing concern for thin-body devices. In this paper, we discuss the impact of self-heating on TDDB using uniform and non-uniform gate dielectric stress. We show lifetime reduction with increasing drain voltages consistent with elevated temperature stress. It is also shown that the power law dependence to gate voltage is preserved at different drain voltages. Due to limited self-heating...
This paper presents a reliability study on unpackaged metal-PZT-metal capacitors. Both ramped voltage stress (RVS) and time dependent dielectric breakdown (TDDB) measurements show that environmental humidity dramatically worsens the PZT reliability. Visible breakdown spots on the surface of PZT capacitors are studied in detail. The measurement results indicate that both reversible and irreversible...
This work presents a device level reliability (DLR) characterization for the Analog Devices proprietary metal contact microelectromechanical systems (MEMS) switch technology. Stand-alone device characterizations in both hold-down and toggle operation modes are described. An alternative operation mode to analyze is the so called “hot switching”. The switch pull-in voltage and the contact resistance...
Tremendous amounts of wafer level reliability testing is required to support transistor technology development efforts. Conventional testing takes considerable time which severely limits reliability organizations. We present two approaches that help increase data velocity for wafer level reliability measurements and discuss their current limitations.
We investigate leakage currents in a-SiOC:H thin films with electrically detected magnetic resonance (EDMR) and new zero field magnetoresistance measurements. We substantially change leakage currents by subjecting the dielectrics to 60Co gamma irradiation. Our results strongly suggest the potential of a very simple measurement, near zero field magnetoresistance, as a reliability physics tool in the...
We present a BTI compact model that is able to account for the complex BTI stress patterns encountered in complex electronic circuits. Such stress patterns are composed of various blocks corresponding to different circuit operation states, protocol modes or input conditions, and the blocks repeat within a composite, hierarchical structure. The present work extends a previously introduced physics-based...
This paper reviews the most relevant threshold-voltage instabilities and dielectric breakdown mechanisms in GaN-based transistors with metal-insulator-semiconductor gate. Metal-insulator-semiconductor (MIS) high electron mobility transistors (HEMTs) with partially-recessed gate have been submitted to pulsed and constant voltage stress, with the aim of evaluating the impact of charge trapping processes...
One of the major purposes of characterizing discrete device reliability is to provide reasonable margin during design phase. Prevention is always better than a cure from risk control and cost management point of view. Over the last decade, foundry has been asked to provide aging aware IP and cell library to reduce customers' product development cycle. Though these libraries were well characterized...
SiC power devices offer performance advantages over competing Si-based power devices, due to the wide bandgap and other key materials properties of 4H-SiC. For example, SiC can more easily be used to fabricate MOSFETs with very high voltage ratings (up to 10 kV), and with lower switching losses. The reliability of SiC power devices is excellent and has continued to improve due to continuing advancements...
Copper in spite of being face centered cubic crystal has significant mechanical anisotropy. The elastic constants of copper vary considerably for different crystallographic orientations. Typically, the copper metal conductor lines in integrated circuits are polycrystalline in nature. The polycrystalline microstructure is known to impact the reliability and is yet to be thoroughly understood. In this...
This work presents a new experimental setup to perform highly accelerated Time Dependent Dielectric Breakdown (TDDB) in constant voltage stress (CVS) mode with capability of collecting failure distributions in sub millisecond regime. The new apparatus is capable of collecting failure times down to tens of microseconds and we demonstrate that power law dependence with respect to gate voltage down to...
This paper presents the long-term stability of integrated CMOS resistors in a 40nm technology node. Unsilicided polysilicon and diffusion resistors with two different geometries were investigated. The thermal stability of the resistors was studied at different stress temperatures. Some resistors were subjected to the critical bake temperature in the WLCSP (Wafer Level Chip Scale Packaging) assembly...
We performed a comprehensive analysis of the voltage-to-erase (Verase) distribution in split-gate flash memory cell arrays. It was shown that Verase distribution is mostly determined by the tunneling voltage variations. Other factors, such as distributions of coupling ratio and FG channel parameters, have a minor effect on Verase variability.
In this paper, we analyze the impact of Layout Dependent Effect (LDE) observed on MOSFETs. It is shown that changing the Layout have an impact on MOSFET device parameters and reliability. Here, we studied the Well Proximity Effect (WPE), Length of diffusion (LOD) and Oxide Spacing Effect (OSE) impacts on device MOSFET parameters and reliability. We also analyzed SiGe impacts on LDE, since it is commonly...
A systematic study of time dependent source/drain junction degradation (TDJD) for extremely scaled FinFETs is conducted. It is verified that junction degradation can be attributed to the increase in band to band tunneling due to generation of new traps upon application of stress. Impact of varying stress conditions, drain engineering and junction area on TDJD is also studied. It is shown for the first...
The factors contributing to the FET threshold voltage shift Δνth caused by charging of an individual trap, such as during Random Telegraph Noise (RTN), are discussed by analyzing device-calibrated simulation data. The Δνth distribution is observed to be a convolution of i) the position of the trap along the channel, randomized by ii) the random dopant distribution (RDD) responsible for percolative...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.