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Tapered polymer optical waveguides with graded-index (GI) circular core are designed and fabricated using the Mosquito method. We show an ideal index profile design for the tapered polymer waveguide allowing a low-loss optical coupling between a VCSEL source and a multimode fiber/waveguide with a large misalignment tolerance.
We propose an novel ultra-dense, low-loss optical coupling solution with optimized coupler design for silicon photonics chip, which is a key enabling technology for optical chip scale package with 336 channels.
This study describes a possibility of an improvement of cooling performance on the surface of heating elements by using an intermittent jet flow like a geyser in nature. An impinging jet flow is widely used for electronics cooling such as CPU coolers and advanced mini-channel devices because the high heat transfer performance can be generally obtained. Due to a miniaturization of electronic equipment,...
This paper introduces a unique experimental setup of stacked thermal chips consisting of 100 polysilicon heaters in a 30 mm by 30 mm area. Temperature distributions in the stacked chips were measured and characterized with varying power in the heaters at a range exceeding 300 W in total; then thermal simulation models were built for 3D integration design.
The papers in this book comprise the digest of the meeting mentioned on the cover and title page. They reflect the authors’ opinions and are published as presented and without change, in the interest of timely dissemination. Their inclusion in this publication does not necessarily constitute endorsement by the editors, the Institute of Electrical and Electronics Engineers, Inc.
On behalf of the IEEE CPMT Symposium Japan committee, it is our great pleasure to welcome you to this symposium. “IEEE CPMT Symposium Japan” is an internationally recognized symposium on leading-edge LSI packaging technologies. The symposium started as the “VLSI Packaging Workshop in Japan” in 1992 and was held in Kyoto every two years until 2008. Beginning in 2010, the mission of the conference was...
We have developed a flip-chip interconnection technique to solve the problem of the degradation of the modulation bandwidth of an optical transmitter due to the parasitic inductance of bonding wire. And we have fabricated an LE-EA-DFB laser module that has a 3-dB bandwidth of 59 GHz thanks to our flip-chip interconnection technique. The fabricated optical receiver, which includes a wideband electrical...
A solderable 28-Gb/s × 4-channel VCSEL-based optical transceiver module was designed for QSFP28 MPO-type transceiver and AOC applications. The module exhibits 28.05-Gb/s × 4-channel simultaneous operation with a jitter margin of −0.4 U.I. at the case temperature of 70 °C. The 4-channel module can be simply mounted on a PCB in compliance with the standard of QSFP28 edge connector, together with other...
A compact 300-Gbit/s (25-Gbit/s × 12-ch) active optical cable (AOC) with a small-form-factor "DensPac™12" module was fabricated. Formed by using high-density optical sub-assembly (OSA) techniques, the DensPac™12-AOC provides high heat dissipation and high optical-coupling efficiency. Furthermore, the fabricated AOC successfully demonstrated 25-Gbit/s error-free multimode transmission.
We demonstrate 4-channel miniature solderable VCSEL-based optical modules with an integrated clock-data-recovery (CDR) circuitry for 100-Gb/s applications. We also propose to use a 1060-nm VCSEL-based optical link using the module and a conventional OM2 fiber cable to reduce the total link cost. When operating the module by a bit stream of 28.05-Gb/s, 231−1 PRBS in the built link system, we observed...
A chip stacking process technology using high mass productivity non-conductive film (NCF) has been developed, with assumptions for the central processing unit (CPU) in high-end servers. With this process, a 23 mm by 23 mm chip with a bump pitch of 40 μm was successfully stacked onto another, and 296,000 bumps were jointed in total. In the development of the chip stacking process, in order to measure...
We fabricate narrow-pitch single-mode (SM) polymer optical waveguides compatible with Si photonics chips by means of a simple process named the Mosquito method. The inter-channel pitch could be 30 μm and less, while sufficiently low crosstalk (<-30 dB) is achieved by the 30¼m pitch SM waveguide at 1550-nm wavelength.
In this paper, microchannels with circular cross-sections are fabricated using the Mosquito method in order to mimic micro vascular networks. We experimentally confirm that microchannels with a straight line are fabricated when dimethyl siloxane monomer is cured at 45 °C. The diameter of the fabricated microchannels is varied from 54 pm to 581 μm with a circularity higher than 0.98 at any sizes of...
TSV (Through silicon via) process has been attractive for smaller and thinner device development. TSV technology makes it possible that vertical communication by electrode between stacked chips. This communication makes devices smaller and thinner because of eliminating of conventional wire bonding. In addition, faster communication and electronic power saving are also advantages. But, Blade dicing...
Resistive open defects in 3D ICs may change into hard open ones. In this paper, a built-in test circuit is proposed to monitor the changing process of the resistive open defects occurring at interconnects between dies embedding an IEEE 1149.1 test circuit. Feasibility of the process monitoring is examined experimentally in a PCB circuit made of ICs embedding the test circuit. It is shown that the...
The reliability enhancement of polybenzoxazoles on Cu for Fan-out wafer level package was studied using TEG1 and 2 with simple re-distribution layer in Fan-out wafer level package. In TEG1 with patterned polybenzoxazole layer on Cu layer, the reliability of polybenzoxazoles around edge of the pattern was improved due to the decrease of the thermal stress in polybenzoxazole by the thinner layer. In...
Photo-definable polyimides and polybenzoxazoles (PBO) have been widely used as dielectrics for re-distribution layers in wafer level chip size packages. These materials can simplify the manufacturing process and ensure high reliability owing to their good mechanical properties and high thermal stability. For next generation electronic components fabricated by utilizing advanced packaging technologies...
High speed digital systems require differential lines for chip-to-chip links. A common concern in differential lines is the presence of common-mode noise, which can also be converted to differential mode, affecting the signal integrity of the differential channel. This paper presents a methodology based on varying the common-mode impedance of a differential line, while keeping the differential-mode...
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