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SCM application gives ReRAM opportunity to become mainstream technology, beyond embedded field. Memory reliability improvement and memory/selector co-optimization are still required. To offer better performance/cost trade-off and differentiate from other technologies are necessary for ReRAM to step forward.
Nonvolatile power-gating (NVPG) that is a power-gating architecture employing nonvolatile retention is expected as a highly efficient energy reduction technique for high-performance microprocessors and mobile/wearable SoC devices. In this paper, the NVPG architecture for SRAM is demonstrated. A 1kb nonvolatile SRAM (NV-SRAM) array with the peripheral circuits is implemented using 65nm silicon-on-thin-buried-oxide...
This paper presents for the first time a TFET/CMOS hybrid CAM architecture designed to address the requirements for ULP (Ultra-Low Power) applications like the IoT (Internet of Things). Proposed design is low power, area efficient and re-configurable i.e. can either be used as CAM or normal SRAM or as a combination of both. The simulation extractions for power and speed are done including wiring and...
Ferroelectric random access memories (FRAM) are nonvolatile memories which allow a fast access time and a low power consumption. State-of-the-art devices are based on the perovskite lead zirconate titanate (PZT), which suffers from CMOS incompatibility resulting in scaling issues. The discovery of the ferroelectricity in doped hafnium oxide enabled scaled 3D memory devices. A variety of dopants has...
A 32-bit icyflex2 processor operating over a wide supply range (WSR) is presented, showing a very low energy consumption in comparison to other state-of-art 32-bit processors. Operating under very different supply conditions involves tremendous differences in operating frequency, and a large sensitivity to process and temperature variations at low-voltage, which both tend to complicate timing closure...
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