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A 32-bit icyflex2 processor operating over a wide supply range (WSR) is presented, showing a very low energy consumption in comparison to other state-of-art 32-bit processors. Operating under very different supply conditions involves tremendous differences in operating frequency, and a large sensitivity to process and temperature variations at low-voltage, which both tend to complicate timing closure...
A 32-bit icyflex2 processor operating over a wide supply range (WSR) is presented, showing a very low energy consumption in comparison to other state-of-art 32-bit processors. Operating under very different supply conditions involves tremendous differences in operating frequency, and a large sensitivity to process and temperature variations at low-voltage, which both tend to complicate timing closure...
A 10 kgates 180 nm sub-threshold stream cipher circuit has been designed focusing on manufacturability, integrated and measured satisfactorily. Silicon measurements show 70 nA total current, 46 nA leakage, at 6.1 kHz for a minimum operating voltage of 0.33 V with no calculation errors. The area of the block is 150'519 μm2.
A 1kb 180 nm single-side read 6T sub-threshold SRAM has been designed focusing on manufacturability, integrated and measured satisfactorily. Silicon measurements show 3.1 nA total current, 2.4 nA leakage, at 530 Hz for a minimum operating voltage of 0.27 V with no bit errors. The area of the block is 22'350 μm2.
This paper introduces and demonstrates with high yield a novel concept for the packaging under vacuum of tuning fork quartz XTALs on top of a silicon interposer equipped with TSVs. It paves the way to the implementation of a monolithic timing microsystem where the ASIC is part of the housing of a newly designed tiny 131-kHz XTAL to reach extreme module miniaturization (1.51.10...
Over recent years the several decades long quartz-dominated timing industry has been continuously challenged by the introduction of new products or demonstration of prototypes based on MEMS resonators [1–4]. The poor intrinsic stability of such devices has led to the development of very high performance temperature sensors to reach TCXO-level frequency stability [5]. One of the true advantages of...
A 150??A/MHz DSP with two MAC/cycle instructions is integrated with a configurable 863-to-928MHz RF transceiver that yields 3.5mW in continuous reception, 2??C per channel sampling and 40mW for 10dBm output. The SoC includes voltage converters that allow 1.0-to-1.8V or 2.7-to-3.6V primary voltage supplies. In sleep mode, it consumes 1??A with a 32kHz crystal-based RTC running.
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