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We investigated the transport properties of n+-p-n+ liquid-gated Si NW FET biosensors using noise spectroscopy. We found that the gate coupling effect results in the channel position being shifted into the depth of the nanowire when the back gate voltage is applied. It was shown that the noise level and signal-to-noise ratio depends on the selected operating mode. By applying the back gate voltage,...
A bipolar junction transistor (BJT) based sensor is investigated for its sensing characteristics such as sensitivity and signal to noise ratio (SNR). The sensor consists of a bipolar transistor with its base connected to a sensing surface in contact with the solution. Measurements are performed using pH buffer solutions and the sensor sensitivity and signal to noise ratio are shown to be significantly...
Electrical transport and thermoelectric properties of thin indium arsenide nanowires have been investigated in the temperature range between 100 K and 365 K. Charge carrier concentration was varied by a back-gate electrode. In nanowires with a diameter of 20 nm, discrete conductance plateaus are observed at low temperature indicating one-dimensional quantization of the density of states. A mean free...
In this paper, we present extensive random telegraph signal (RTS) noise characterization in advanced SiGe:C heterojunction bipolar transistors. In frequency domain, in addition to 1/f noise, generation-recombination (G-R) mechanisms are observed at low base bias in the base noise. Their existence is confirmed by RTS noise measurements in time domain. The RTS amplitude evolves rather slowly with bias,...
For 1.0V operation NAND flash memory, heterogeneously integrated voltage generator is proposed and experimentally demonstrated. The proposed 2-stage boost converter uses high voltage (HV) transistors of standard CMOS process as the 1st stage and HV transistors of NAND flash process as the 2nd stage. The intermediate load capacitance is adaptively adjusted according to the number of NAND flash chips...
Phase change memory (PCM) has reached the status of mature technology for stand-alone, embedded, and storage-class memory (SCM). A key requirement for these applications is stability at high temperature (T) during soldering, packaging and operation. To this aim, new materials and algorithms to improve reliability are essential. Here we demonstrate bipolar switching in PCM resulting in low-current...
We investigated the floating gate memory based on MoS2 channel with metal nanoparticle charge trapping layer and polymer tunneling dielectric. Here, highly conformal and stable polymer insulator layer deposited via initiated chemical vapor deposition (iCVD) facilitates the fabricated floating gate memory to endure a substantial electrical stress significantly. To form a selective density and controllable...
Building reliable mixed-signal circuits in advanced process technologies requires an accurate understanding of device performance and variability. This work presents an on-chip transistor characterization platform built on a digital focal plane array readout circuit framework that enables highly parallel device measurements to be taken in the digital domain. This technique is used to quickly assess...
The lack of dynamic stability in memory circuits such as the Static Random Access Memory can lead to read/write failures or power supply limitations. In this work, the impact of low-frequency and random telegraph noise on the dynamic variability of a single SRAM cell is examined for the first time. The dependence on device noise level, speed and duration of operation is investigated, using the Supply...
A 32-bit icyflex2 processor operating over a wide supply range (WSR) is presented, showing a very low energy consumption in comparison to other state-of-art 32-bit processors. Operating under very different supply conditions involves tremendous differences in operating frequency, and a large sensitivity to process and temperature variations at low-voltage, which both tend to complicate timing closure...
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