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Finite impulse response (FIR) filtering is an ubiquitous operation in digital signal processing systems. It is generally implemented in full-custom style due to the high-speed and low-power design requirements. The hardware design of a FIR filter is mainly dominated by the multiplier block, which is generally implemented as a network of adders, subtractors and shifters for more efficiency in speed...
We propose a simulation-based analog equivalence checking methodology between high level Simulink models and their low level Spice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates around the optimal point of equivalency to obtain a range of input...
In this paper, we present a low power and configurable pulse generator with on-off keying (OOK) modulator feature for non-coherent impulse radio (IR) receiver synchronization and intermittent receiver operation. The pulse generator has adjustable pulse width and pulse delay properties. The configurability is achieved using on-chip bias cells with external inputs. The pulse width can be configured...
This paper highlights a fast and accurate full-wave modal integral technique based on the calculation of inner products obtained through the Galerkin's procedure, when trial functions taken in the account the edge effects are used. By using trapezoidal numerical integration with nonuniform discretization steps, the proposed approach allows fast calculation of such inner products, thus significantly...
This paper presents a high-bandwidth 2 GHz CMOS variable gain amplifier (VGA) for using in the band of square kilometer array (SKA) range that achieves an 18 dB dynamic range (DR) while powered from a single 1.8 V supply. This VGA capability is obtained by employing a passive digital T-bridge attenuator followed by a fixed amplifier, the use of attenuator in the front end of the VGA results in a high...
Pareto fronts of circuits whose performance depend on other circuits that they are connected to must be updated for each interconnection conditions. This paper reports, for the first time, the conditions for which a transformation without loss of information is guaranteed.
In this paper a method is presented to address the automatic testing of analog ICs. Based on Design-for-Testability building blocks offering extra controllability and extra observability, a test infrastructure is generated for a targeted circuit. The selection of the extra blocks and their insertion into the circuit is done automaticaly by a proposed optimization algorithm. Adopting a defect-oriented...
Analog circuit sizing has become a very challenging process due to increased non-idealities for advanced technology nodes. Moreover, reliability of circuits has become a major concern, where process variations and aging phenomena have been substantially worsened in deep-sub-micron devices. Thereby, traditional circuit optimization tools have been replaced by more complicated ones, which take reliability...
Reliability has become a critical challenge in integrated circuit design in today's CMOS technologies. Aging problems have been added to the well-known issues due to spatial variations that are caused by imperfections in the fabrication process. In this sense, transistor wear-out phenomena such as Bias Temperature Instability (BTI) and Hot Carriers (HC) cause a time-dependent variability that is added...
The main capabilities and the possible applications of a software package, developed by the authors and aimed at the simulation of analog linear (or linearized) circuits, are presented in this paper. The program, named SapWin 4.0, is an enhancement of a previous software package of the same authors developed along the last two decades and distributed in many schools, institutions, industries and research...
Having wide application area and high performance, Fluxgate magnetometers are popular devices to measure low frequency AC and DC magnetic field vectors. In this work, we designed a simple and a low cost magnetometer prototype to obtain natural earth magnetic field value between ± 0.6 Gauss (G). Using basic microprocessors and a phase detection code technique, unlike conventionally lock-in amplifier,...
In this paper, a statistical approach is proposed for analysis of electromagnetic compatibility of printed circuit boards using trace orientation function. The board traces are one of the most responsible for radiated emission and susceptibility of the electronic system implemented on it. Trace orientation function, as a novel approach, is a random function which considers the arbitrary position and...
A new procedure for the state matrix simplification, used in the computation of the approximate symbolic pole/zero expressions is proposed. This procedure validates a simplification in a circuit matrix employing the error in the design point, the maximum error in all corners defined by all combinations of the extreme parameter values, and the modal assurance criterion.
Many prior works have investigated electromigration (EM) on full-chip power grid interconnects, which has become one of major reliability concerns in nanometer VLSI design. However, most of the published results were obtained under the assumption of uniformly distributed temperature and/or residual stress across interconnects. In this paper, we demonstrate the implementation of novel methodology and...
This paper presents a comparison study between various signal modeling techniques, combined with power series expansion to design infinite impulse response (IIR) filters based on fractional integration for 1/fβ sequences synthesis. It was found that the approximation accuracy of the power spectra, the computation time and the space memory required depend highly on the signal modeling techniques used...
This paper introduces the design and implementation of a high performance, reconfigurable four channel beam steering unit (BSU) for active phased-array antennas based on FPGA synthesized delay-lines and PLLs. The unit allows a per channel programmable time delay equivalent to a phase shift tuning step of about 1.4°. A prototype has been implemented to validate the viability of the proposed approach...
Distortion Contribution Analysis (DCA) is a simulation-based analysis in which the total output distortion generated by an analog electronic circuit is split into the contributions of each of its sub-circuits. Earlier work has shown that combining the Best Linear Approximation (BLA) with a classic noise analysis yields a DCA which uses a wideband excitation signal without requiring knowledge about...
This paper presents a methodology to design voltage controlled oscillators. The usefulness of the design proposal is shown by designing a LC oscillator in a 130nm CMOS technology, intended for Bluetooth/Zigbee applications. From simulations results, when temperature varies from 0 to 100°C, power consumption ranging from 3.1mW to 3.81mW is achieved. At 3.4mW of power consumption, a phase noise of −119...
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