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A digital calibration technique for folding-integration/cyclic cascaded (FICC) analog-to-digital converters (ADCs) is proposed in this paper. The calibration is done by compensating non-ideal errors in digital domain. The errors generated during each converting cycle and the final effects of them are calculated with properly established model in charge domain according to the behaviors of the FICC...
This paper presents a fully integrated operational amplifier (OPAMP) with positive feedback fabricated in a flexible amorphous indium gallium zinc oxide (a-IGZO) thin film transistor (TFT) technology. The OPAMP is implemented by using a 5 µm nMOS a-IGZO TFT process, and is operated from a dc supply voltage of 6 V. The circuit relies on positive feedback in the input differential pair to improve gain...
This paper investigates an inductorless technique for bandwidth extension which uses local positive feedback in an optical receiver front-end based on an inverter-based transimpedance amplifier and Cherry-Hooper post-amplifiers. Small feedback inverters create negative resistance that boosts the output resistance of inverter-based amplifiers. Compared to a reference design having a TIA and a three-stage...
This paper presents an inductorless, 10Gbps automatic gain control (AGC) circuit including a speed enhanced variable gain amplifier (VGA), a power detector, a comparator and a switching exponential function generator for extended dB-linear performance. Third order interleaved feedback technique is utilized to enhance the speed of the current steering VGA stage. A stagger-tuned switching architecture...
This paper demonstrates a high frequency power detector with high conversion gain for frequency-shift sensing applications used in biosensing systems. The proposed design comprises an amplitude-to-voltage convertor (AVC), a peak detector, and a bandgap. To increase the operating frequency range, AVC utilizes half of an RMS power detector to attain the power measure of an input signal. Since the input...
A 100 Gb/s transimpedance amplifier (TIA) for next generation optical communication adopts a diode-connected input-resistance-reduction architecture and is designed in 32 nm CMOS SOI technology. The proposed TIA design is based on a gm-boosted common-gate amplifier with a diode-connected current source and incorporates a single-to-differential signal conversion architecture. The input resistance of...
In this paper, a design for a quadband linear/efficient class-AB power amplifier, with an output power exceeding 10-watts in all four bands is presented. The designed power amplifier - based on a GaN HEMT- provides a power added efficiency over 47% in all four bands. Source/load-pull simulations are used for optimum matching at each band; quadband stub-based matching is used for input matching whilst...
This paper presents a concurrent CMOS dual-band LNA (DB-LNA) targeting the FCC automotive short and long range radar bands located at 25.5 GHz and 76.5 GHz, respectively. The DB-LNA utilizes a second order dual-band matching network to achieve a 7 GHz bandwidth in the input matching network at 25.5 GHz. Mathematical formulas assist in determining the matching network and output load components values...
An intuitive yet mathematically rigorous procedure for arriving at a DAC element rotation algorithm (ERA) from a given general mismatch transfer function (MTF) is presented for sigma-delta data converters. The approach is validated by deriving low-pass and high-pass ERAs from the corresponding MTFs. Using the proposed approach the ERA for a quadrature sigma-delta ADC is then derived from a quadrature...
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