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Register File (RF), Static Random Access Memory (SRAM) and Read Only Memory (ROM) arrays on SoCs comprise over 50% area and consumes substantial power on die. The On die ROM usage is increasing as there is an increased focus on IOTs, multi-core microprocessor for notebooks, 2-in-1s and mobile applications. Achieving high performance at low power specification need considerable innovation. Use of High...
This work explores a methodology to optimize the layout of a electro-static discharge (ESD) structures for improving the performance of low voltage swing differential amplifier (LVDS). The parasitic capacitance of ESD structures are extracted. The role of our work is to optimize the parasitic capacitance in the I/O circuit while improving the ESD robustness. The work first compares impact of capacitance...
This paper reports the fabrication of n-type MOSFET using Si3N4 as dielectric on the same wafer as ISFET for ISFET characterization. The paper presents the fabrication, simulation and characterization of metal-oxide field-effect transistor (MOSFET). The gate of the ISFET is stacked with Si3N4 sensing membrane layer that has been deposited using LPCVD system to cover the gate area. Output and transfer...
In this paper, improvement in the RF performance of a conventional LDMOS transistor on silicon-on-insulator (SOI) is investigated by incorporating trenches in the drift region and we propose a lateral trench RF LDMOS device. The proposed structure consists of three trenches built in the n-drift region. A single vertical gate is placed centrally in the trench between p-body region thus forming dual...
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