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Wireless Sensor Networks (WSNs) are known to be greatly energy-constrained, especially for vision-based applications. Image compression can provide energy efficiency by reducing the data flow to be transmitted at the cost of more computation. The compression scheme must be designed with respect to the tradeoff between computational complexity and compression ratio. The aim of this paper is to present...
Transition inversion coding (TIC) can reduce serial bus power dissipation by negating the even-numbered bits of a data word if the number of transitions in the data word is larger than half its word length. The codewords generated by TIC also enable up to a certain error detection rate. This paper proposes a method called PTIC that uses a parity bit along with TIC to achieve 100% single-bit error...
This paper presents a CMOS track-and-hold (THA) circuit using pseudo differential source follower. Without using high gain high power consumption operational amplifier, the input analog signal sampled with bottom plate sampling technique and held at the gate of the source follower PMOS transistor. The harmonic distortion of the source follower is improved by eliminating the short channel effect of...
This paper presents a low-power optimization technique (LPOT) for a 1V pipelined RISC microprocessor circuit via multi-threshold CMOS (MTCMOS) techniques. Using the MTCMOS LPOT, a 32-bit pipelined RISC microprocessor test circuit having 144,000 transistors with 3 stages per instruction has been optimized in terms of power consumption using standard threshold-SVT and high threshold-HVT logic cells...
NoC-based MPSoCs are well suited for applications requiring high performance while maintaining a low-power profile. Therefore, it is important to estimate the energy consumption at early stages of the design flow due to the limited power budget imposed by the batteries. State-of-the-art proposals estimate the energy due to the NoC or the processing elements. Few works address the energy modeling and...
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