The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper describes a complete low-power System-on-Chip (SoC) dedicated to Electrocardiogram (ECG) monitoring, and focus on the analog front-end sensor interface. The SoC mainly embeds a three channels ΣΔ-ADC-based sensor interface, an energy-efficient ECG signal processing and a low power radio-frequency transceiver (RF). The whole SoC was fabricated in TSMC 0.18µm General Purpose CMOS process....
We present an analog neural recording front-end design that can be easily interfaced with Address-Event Representation (AER) neuromorphic systems via an asynchronous digital communication channel. The proposed circuits include a low-noise amplifier for biological signals, a delta-modulator analog-to-digital converter, and a low-power bandpass filter. The bio-amplifier has a gain of 54 dB, with an...
This paper presents an effective method of input referred noise minimization (IRN) of recording stages dedicated to neurobiology experiments and processed in submicron or nanometer technologies. We analyze different approaches for IRN minimization and propose solution based on the on-chip analogue noise averaging. The proposed approach allows for almost 2.5 times IRN minimization with only 8 time...
In this paper, we present an instrumentation amplifier for high speed electrical impedance tomography. The instrumentation amplifier includes a fast acting automatic gain control, which allows it to process a wide dynamic range of input signals with low power consumption and without sacrificing the frame rate of the tomography system. The instrumentation amplifier was designed in a 3.3 V, 180 nm CMOS...
This paper presents the electrical and in-vivo validation of a compact, low-noise and low-power integrated circuit for the acquisition of cortical signals in a high-density implantable system. Using a three-stage topology, the proposed architecture enables a compact implementation of the analog front-end, while preserving a low-noise and lower-power performance. A wireless energy transfer module is...
An ultra low power low noise analog front-end for ECG signal acquisition is demonstrated. Key to its performance is a multi-frequency chopping technique that helps to significantly reduce power consumption by frequency-division multiplexing of two channels in a single low noise instrumentation amplifier. A complete two-channel analog front-end, chopped at frequencies of 4 kHz and 8 kHz, is implemented...
A new single-stage configuration is proposed for low-power low-noise amplifiers designed for neural recording applications. Employing an attenuator in the feedback loop around the amplifier, both upper and lower cut-off frequencies of the amplifier (fCL and fCH) are realized using much smaller capacitances as compared with those used in other neural amplifiers available in the literature. This leads...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.