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The multilayer Package-on-Package (POP) stacking technique is widely applied in the area of portable electronics, which has better flexibility and expansibility. Meanwhile, the signal speed in 3D integration packages increases continuously, which requires package interconnect structure to have good signal integrity. In this paper, based on a novel stacked cylindrical POP package structure, a design...
The demand for Cu Pillar Bump (CPB) has been significantly increased due to the fine pitch, high bandwidth, and high thermal performance requirement. However, the Cu pillar also has its own defect for the high peeling stress on the low K layer compare to the eutectic solder bump. To overcome the high peeling stress defect, optimize the CPB design is very important. This paper has three major topics...
In this paper, we will review the silver-indium (Ag-In) phase diagram and explores its unique features that enable the development of new bonding processes for electronic packaging. Its melting range covers 156°C to 952°C, from In melting point to Ag melting point. It consists of three intermetallic compounds (IMC), AgIn2, and Ag2In, and Ag3In, and a solid solution (Ag). Our experimental results do...
The Au-Sn binary phase diagram shows that there are two eutectic alloy compositions. The first one is at ∼30 at% Sn (Au-rich) with a melting point of 280°C and the second composition is at ∼94 at% Sn (Sn-rich) with an eutectic temperature at 217°C. This paper summarizes work that demonstrates that both eutectic alloys can be electrodeposited from electrolytes that are non-toxic and environmentally...
Basic soldering is a chemical reaction between the solder element such as tin (Sn) and the base metal such as copper (Cu) or nickel (Ni), producing intermetallic compound (IMC) such as Cu6Sn5 or Ni3Sn4. It is the IMC that connects the solder to the metal. The IMC layer grows with time during usage, resulting in potential reliability issues. In this research, we looked into and developed soldering...
The higher density packaging technologies have been required to reduce the area of substrate for smaller portable handheld products and devices such as smart phones and tablet PCs. So, the three-dimensional packaging is becoming to be a key technology to minimize the total size of products and devices.
We suggest and investigate a new concept of nanofiber ACA that incorporates microsolder balls into nanofiber to obtain stable three-dimensional electrical properties of fine pitch electronics. This adhesive offers many advantages, such as suppressing microsolder ball movement during resin flow, perfect X-Y axes insulation at 25 µm fine pitch, and easy fine solder ball handling. Microsolder balls can...
Electrospinning is an inexpensive technology used for the large-scale production of continuous nanofiber materials. The development of Electro-Mechanical Spinning (EMS) technology by our team is based on electrospinning, but achieves greater deposition control at the single nanofiber level while maintaining the low cost of the original process. By integrating EMS with Carbon-MEMS and Focused Ion Beam...
This paper presents the morphology evolution of the interfacial intermetallic compound (IMC) in Cu/Sn-58Bi/Cu solder joint during current stressing and loading temperatures. The IMC growth kinetics and Bi migration towards the anode side was analyzed and discussed. One dimensional semicircular sectioned solder joint was fabricated and used to conduct the electromigration (EM) experiment, effectively...
The introduction of lead-free (LF) solder metallurgy have contributed to a gradual reduction in the bend performance of board level interconnects (BLI) of ball grid array (BGA) packages. In this paper, bend performance of lead-free plastic BGA assemblies with thermal curing epoxy and UV curing acrylic edge-bond adhesives was investigated using 3-point bending test. The assemblies without adhesives...
This paper proposes a new 3-D stacked package structure and assembling method, which can be widely used on the system-on-chip (SOC). This present package increases the area of the bottom of the substrate and solders square compact structure for signal transmission around the substrate. Meanwhile, it also removes the solder balls on the bottom of the substrate and coats with the radiating layer. So...
Stressed by a high current density, several EM-induced reliability issues would likely occur at the flip-chip Cu/Sn joint interface. At the cathode interface, EM-induced Cu-pad consumption occurred at the current-entry point (maximum current-density) and voiding occurred at the other joint corner away from the current-entry point (minimum current-density). At the anode interface, EM-enhanced Kirkendall...
The age of advanced mobile devices is on the direct horizon, are we ready for it? Less power consumption, faster processing, high reliability, high yield, low cost are words engineers are all too familiar with. 2.5/3D utilizing interposer technology, Thru Silicon Via (TSV), sub-50µm die thickness are a few of the latest techniques engineers use to solve these issues. As technology progresses to smaller...
Paste-filled-via interconnects were introduced to the electronics packaging industry in the mid 1990's. Since then, implementation of paste interconnection has grown to encompass a number of different package architectures. Transient liguid phase sintering (TLPS) pastes are a unigue family of paste materials that form a continuous metallurgically alloyed pathway from the upper pad, through the bulk...
Post semiconductor manufacturing processes (PSM), including packaging and printed circuit board (PCB) technologies with a few micrometer line and space resolution and sub-mil vias are readily achievable. Such PSM technology can be used to manufacture micro electromechanical systems (MEMS) for sensing and actuation applications, which are traditionally produced using silicon processes. A lamination-based...
Thermal management is of critical importance for high power white light-emitting diodes lamps in which blue chip array is combined with yellow phosphors. In this study, the thermal performance of a 100W white LED package on a heat sink with a CCT of 4500K under different phosphor configuration was investigated by a combination of the ray-tracing simulation and computational fluid dynamics simulation...
As increasing harsher requirements are brought in to meet the specification for the volume and the area, the integration level of systems tends to be denser and then a high density package, known as Package-on-Package (PoP), comes into being. However, the high density PoP also brings about negative effects at the same time, of which poor heat dissipation inclines to make chip overheat and therefore...
Iron (Fe) with small percentage of carbon (less than 0.2%) is known as low carbon steel. It has numerous industrial applications since the Iron Age. It possesses high strength, high melting point, and low CTE. It is very inexpensive. The downside is fair thermal conductivity, which can be compensated using thinner substrates and thinner solder layer. The other downside is that it rusts easily and...
Commercial-off-the-shelf area array package (COTS AAP) technologies in high-reliability versions are now being considered for use in a number of electronic systems. Although to improve mechanical resistance of fragile flip-chip die within package, these advanced electronic packages commonly use underfill for the die attachment; full or partial corner underfilling may also be required at the printed...
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