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This paper introduces a mapping method for adding a coarse grain (multiple pixels per processor) processing mode to massively parallel cellular processor arrays. The main motivation is to provide the fine grain pixel-parallel processor array with the ability of processing images with higher resolution than the array itself, in a way that is transparent to the programmer. The proposed method accomplishes...
We describe a pilot project for the use of GPUs in a real-time triggering application in the early trigger stages at the CERN NA62 experiment, and the results of the first field tests together with a prototype data acquisition (DAQ) system. This pilot project within NA62 aims at integrating GPUs into the central L0 trigger processor, and also to use them as fast online processors for computing trigger...
High energy physics particle detectors are large and complex devices with very demanding requirements at the level of signal to noise ratios, processing times and data throughput. The first stages of the data acquisition are hardware based while the last ones depend rather on software. Among the solutions to the problems posed by the requirements we may find the use of multi-core processors or maybe...
This paper describes the of a 90 nm CMOS sub-THz detector array ASIC. The sub-THz detector array is an integrated system composed of silicon field effect plasma wave sensors, various integrated antennas, pre-amplifiers, ADCs, and digital domain lock-in amplifier detector. The peak responsivity is found 185 kV/W@365 GHz and 52 kV/W@470 GHz and at the detectivity maximum NEP ∼ 20 pW/Hz−1.
The online event reconstruction for the ALICE experiment at CERN requires processing capabilities to process central Pb-Pb collisions at a rate of more than 200 Hz, corresponding to an input data rate of about 25 GB/s. The reconstruction of particle trajectories in the Time Projection Chamber (TPC) is the most compute intensive step. The TPC online tracker implementation combines the principle of...
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