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A SiGe p-channel FET has been fabricated with LPCVD epitaxy and thin gate oxide at low temperatures. With a Ge content of 20% a Si/SiGe/Si quantum well with 0.15eV depth and 10nm thickness is formed in the valence band. Compared with a bulk Si p-channel transistor peak mobility is increased by about 50%. High mobility, 0.4μm gate length and 5nm gate oxide result in high saturation current of 0.22mA/μm...
In this work we present a detailed study of the electroluminescence properties of Si1-xGex/Si double heterostructure diodes. The diodes were grown selectively by low pressure chemical vapor deposition which enables to grow dislocation-free and fully strained Si1-xGex layers much above the critical thickness. The electroluminescence is shown to be due to the recombination of free excitons at lower...
SiGe heterojunction bipolar transistors (HBTs) with very thin n+ hydrogenated amorphous Si (α-Si:H) emitters and various doping and Ge distribution profiles in the bases are reported. An analytical model defining the leverage of the structures in terms of current gain and high Early voltage is presented and verified experimentally. Devices having a base doping concentration of 1??1019cm-3, a base...
A new fabrication method for SiGe-HBTs is presented using molecular beam epitaxy (MBE) for growing the device layers on SiO2 patterned Si wafers. The epitaxial layers inside the SiO2 windows are monocrystalline. The polycrystalline Si and SiGe on top of the surrounding SiO2 is used for the base contact. This technique reduces the parasitic base-collector capacitances. The first differential SiGe-HBTs...
This paper describes a method for extracting the bandgap narrowing in the base of Si homojunction or Si/Si1-xGex. heterojunction bipolar transistors from the temperature dependence of the collector current. The method is applied to a Si homojunction transistor with a 6 ?? 1018 cm??3 epitaxial base, and a doping-induced bandgap narrowing of 39meV is obtained. The method is also applied to a Si/Si0.84...
HBT layers have been fabricated using a multi-step process in a single run. They were made in a new, single-wafer, 200 mm compatible, cold wall UHV-CVD reactor [1]. Preliminary electrical measurements on fabricated transistors demonstrate excellent control of layers thickness and doping transitions which allows to compare these HBT layers with those fabricated by MBE [2] or hot-wall UHV-CVD [3].
In this paper we present excellent low-frequency noise performances of passivated Si/SiGe heterojunction bipolar transistor. We report noise corner frequency in the 10 kHz range for the input noise voltage generator and in the 100 kHz range for the input noise current generator. We show that 1/f noise is probably generated both in the distributed base resistance and along the emitter finger.
In this article several features of the selective epitaxial growth of SiGe by LPCVD are discussed, such as the pad size dependence of growth rate, composition and strain relaxation. Finally, intense photoluminescence from sub??m dots with SiGe/Si multiple quantum wells is presented.
Using the Si/SiGe heteroepitaxy grown by a solid-source (SS) molecular beam epitaxy (MBE) on the LOCOS (LOCal Oxidation of Silicon)-patterned wafers, a Si/SiGe heterojunction bipolar transistor (HBT) which is isolated by polysilicon-filled trench has been fabricated. In order to reduce the extrinsic base resistance, titanium silicide (TiSi2) layer directly patterned on the epitaxially grown layer...
In small Si bipolar transistors (BJTs) the sidewall effects play an important role. Extensive device simulations on Si/SiGe/Si heterojunction bipolar transistors (HBTs) and Si BJTs show that in the HBTs the sidewall current injection is strongly suppressed. Consequently, the current gain in the HBT keeps constant down to a much smaller emitter width (We ?? 0.20 ??m) than for a conventional Si transistor...
We propose here a back junction SiGe PMOS structure having a cross section of Poly/SiO2/Si-cap/SiGe/n-epi/p-substrate. The electrical coupling between the front gate and the back p-substrate/n-epi junction reduces the vertical field, thus improving the hole confinement and the SiGe channel mobility, resulting in an improved effective channel mobility. Numerical simulation shows that the back junction...
The first SiGe p-MOSFETs with triangular Ge profiles, fabricated in a Si CMOS-compatible LOCOS isolated process are reported. The feasibility of triangular profiles with peak Ge mole fractions as high as 50% is demonstrated for both CVD and MBE MOSFETs. The transconductance of 3 ??m devices with 0-40% Ge profiles is 34 mS/mm, 100% higher than that of the corresponding Si p-MOSFET fabricated on the...
We have grown Si/SiGe modulation doped quantum wells by gas source molecular beam epitaxy using, for the first time, arsenic as an n-type dopant. The layers are characterised by magnetotransport measurements and SIMS analysis. The latter shows an arsenic concentration in excess of 1019 cm??3 along with strong surface segregation.
High dose Ge+ ions were implanted into SIMOX substrates to synthesize SiGe alloys. These samples were evaluated by using RBS channeling and XTEM. The dose of implanted Get effects strongly the density of defects remaining in the surface SiGe layer. At a dose of 1.6??1016 Ge+ cm??2, SiGe layer with a very good crystallinity could be achieved through annealing at 950??C for 1h.
A new procedure for realistic calibration of dopant diffusion models to SIMS data for thin doped Si and SiGe layers has been achieved by bringing model data into a form appropriate for direct comparison with measured SIMS and so separating the genuine diffusion broadening from instrumental effects.
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