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The design and wafer probe test results of a 5-bit SiGe ADC are presented. The integrated circuit, fabricated in a 200/250 GHz fT/Fmax, SiGe BiCMOS technology, provides a 5-bit analog to digital conversion with input tone frequencies up to 20 GHz and sampling clock rates up to 35 GS/s. The ADC makes use of a comparator with an integrated exclusive-or function to reduce power consumption. The device...
This paper deals with general discussion over high-speed data converter architectures. Nowadays, more and more researches are focused on the ability to design transceivers able to manage digital data as soon as possible right behind the antenna. These so-called Software Defined Radio architectures are one of the easiest ways to design a receiver with low time-to-market impact. Furthermore, most of...
A RF 2.6-GHz direct-conversion receiver front-end for CMMB (China Mobile Multimedia Broadcasting) tuner system is implemented in SiGe BiCMOS technology. It consists of a low noise amplifier (LNA) with high-gain/low-gain (HG/LG) modes, a continuously tuned radio frequency variable gain amplifier (RFVGA) and a down-conversion mixer. The receiver delivers a power gain of 36 dB, an input-referred-3rd-order-intercept-point...
Improving the ESD robustness of integrated protection structures to cope with the constraints of severe environments such as the automotive one is a real challenge. Getting a deep understanding of the involved high injection physics during an ESD stress helps defining specific design guidelines. The grounded-base NPN bipolar transistor is a popular and efficient protection device. In this paper, we...
Two low-power, high-gain preamplifiers designed for a 7.2-7.7GHz (high band) FM-UWB receiver in 0.25mum SiGe:C-BiCMOS technology are described. Each preamplifier has single-ended input/differential outputs and is aimed at low-power, low data rate applications. Both amplifiers consume 3.6mW from a 1.8V supply. The maximum measured voltage gain is Gt30dB with 500MHz bandwidth for both designs, and they...
This paper reports on a 60 GHz common base fundamental oscillator with ultra low phase noise realized in QUBIC4Xpsilas HBT technology. It uses a silicon micromachined cavity resonator which is mounted on a common MCM PASSI3I carrier and coupled to the MMIC. A novel feed approach is presented which uses a wirebond to couple the interconnecting CPW line to the KOH-etched silicon cavity of which the...
This tutorial presents the unique issues that must be considered when designing electronics for space applications (including, but not limited to, radiation effects), and how key satellite system building blocks are affected by these issues. We review the common design techniques used to mitigate these effects, with an emphasis on those used within custom bipolar integrated circuits. Finally, we discuss...
Leakage through the base is a common yield detractor in SiGe NPNs. The defects are commonly referred to as dasiapipespsila and are manifested as a current path between emitter and collector independent of base bias. In this article we discuss pipes which have been observed due to retarded base growth. Advanced light/thermally induced voltage alterations (LIVA) and cross section transmission electron...
The influence of stress induced by shallow trench isolation (STI) on the geometry scaling of DC parameters in SiGe HBTs is studied. It is shown that smaller devices experience higher stress effect due to the STI than larger devices. In the presence of stress, the scaling of transfer current with geometry can not be fully accounted by separating it into area and perimeter components. STI stress effect...
This paper describes the characteristics and performance levels of unipolar as well as bipolar organic field-effect transistors (FETs) and also the possible applications enabled by these performance levels. Unipolar FETs can be either p-channel or n-channel depending on the active semiconductor chosen as well as the nature of the semiconductor-insulator interface, and bipolar FETs can be used as light-emitting...
We present experimental proof of the electro-thermal bifurcation and mutual heating in bipolar transistor arrays using photon emission microscopy. With this technique, no electrical probing of each individual transistor in the array is needed but optical measurements allow accurate determination of the electro-thermal effects. For identically processed transistors in an array, we show that current...
A very low-noise voltage reference is described built on a complementary bipolar process with the addition of dual-threshold P-channel JFETs. The difference between the two JFET thresholds exhibits stability and noise suitable for use as the basis of the reference. Additional circuitry amplifies and adjusts the tolerance and temperature coefficient of the threshold difference to create a 2.5 V temperature...
This paper presents a BiCMOS frequency synthesizer covering frequency range from 500 MHz to 2175 MHz which is fully compatible with DVB-S application. The frequency synthesizer consists of monolithic VCOs, utilizing on-chip symmetric inductor, high speed CML divider built with high performance BJT, and can achieve -80 dBc/Hz, -100 dBc/Hz, -123 dBc/Hz phase noise at 1 KHz, 100 KHz and 1 MHz carrier...
This paper presents a novel RF receiver front-end using only one shared tail current for low power application. The 5 GHz receiver front-end RFIC includes a voltage controlled oscillator (VCO), a double balanced mixer and a low noise amplifier (LNA) in a cascoded topology. The receiver RFIC was implemented in a 0.5 m SiGe BiCMOS technology. The VCO oscillation frequency is around 5 GHz, targeting...
A 4-element phased-array front-end receiver based on 4-bit RF phase shifters is designed for 36-46 GHz satellite communications. The phased-array uses a corporate-feed approach with integrated Wilkinson combiners for linear coherent power combining. The measured loss in the Wilkinson coupler is 0.5-0.6 dB at 30-50 GHz. The phased-array shows 10.4 dB of average power gain, les1.2 dB of RMS gain error,...
This paper describes a new topology and implementation of a 10 Gbps LVDS (low voltage differential signaling) voltage mode output driver designed for high speed data transfer applications. Using a positive feedback technique, the driver achieves ultra low power operation while maintaining the proper internal chip impedance required for matching the line impedance. As a result, signal reflection is...
The following topics are dealt with: analogue circuits; device physics; power devices and ESD; RF power amplifiers; advanced modelling; BiCMOS platforms; ICs for radar; SiGe HBTs; reliability physics; MM-wave building blocks; power devices for automotive applications; technologies for system integration; UWB receivers; high-speed ADCs.
An ultra-high-speed SiGe track-and-hold amplifier (THA) using a switched-emitter-follower (SEF) configuration is presented. Operating off a +5.5 V power supply, this THA exhibits -32.4 dBc of total harmonic distortion (THD) when sampling a 10 GHz input signal at the rate of 40 GS/s, and reaches -50.5 dBc of THD when sampling a 2 GHz input at 12 GS/s. Compared to the THAs published in the literature...
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