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In this paper, a low-power high-speed CMOS full adder core is proposed for embedded system. Based on a new three-input exclusive OR (3-XOR) design, the new hybrid full adder is composed of pass-transistor logic and static CMOS logic. The main design objectives for the full adder core are providing not only low power and high speed but also with driving capability. Using TSMC CMOS 0.35-mum technology,...
The evolutionary technique of test frequencies selection for analog sinusoidal stimuli set is described in this paper. The proposed method bases on ambiguity set concept and evolutionary algorithm that has been executed for fuzzy and weighted fitness functions. The proposed approach to analog testing allows to achieve high efficiency for practical circuits under test with tolerance dispersions and...
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