The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
We developed parameter extraction method based on a BSIM3-like compact model to analyze low field drain current with size dependent mobility in nano-scaled MOSFETs. Our new straightforward algorithm has made it possible to automatically extract model parameters with high accuracy and robustness. It is applicable to wide variation of device sizes, structures and materials.
The radiation hardness of advanced SiGe BiCMOS technologies is being evaluated in order to check their applicability for the front-end readout electronics of the ATLAS Upgrade in the framework of the Super-LHC at CERN. A model that describes the effect of ionizing radiation on bipolar transistors as an exponential term is widely accepted. Nevertheless, this model is not very precise in the bias ranges...
A new methodology is proposed to extract self-heating free I-V curves, including the substrate current, of SOI MOSFETs based on triple-temperature, regular DC measurement. It is verified to be accurate with Hspice simulations and suitable for SPICE model parameter extraction. It is also demonstrated that extraction of self-heating free I-V curves is not only desired for efficient SPICE model generation,...
Recently, the PSP model was selected as the first surface-potential-based industry standard compact MOSFET model. This work presents the results of several qualitative "benchmark" tests that over the last two years were used to verify the physical behavior of the new model and its usefulness for future generations of CMOS IC design. These include newly developed tests and previously unavailable...
MOS transistor threshold voltage matching is usually modeled proportionally to reverse square root of gate area. Yet this model is not satisfactory when discontinuities are observed. In this paper, a continuous matching model with only two parameters is given. It is obtained by analyzing impact of short channel effects on matching degradation.
In this paper, we have investigated the impact of the carbon concentration on bipolar transistor matching at medium current region. Original base current matching results, obtained from the characterization of two carbon concentration splits in a SiGe:C BiCMOS technology, are first discussed and well interpreted by a new base current mismatch physical model. Our assumptions are also confirmed by a...
Delivering mismatch data that reflect design reality is a real challenge. Indeed, from test structures to final data utilization, many steps can be the source of distortion. The first possible source of distortion is linked to the differences in terms of environment and spacing that might exist between test structure transistors and circuit transistors. The second potential source of distortion is...
For device modelling purposes, the geometry dependence of the external collector resistance has been investigated. Firstly, the collector resistance is split into a perfectly 1D vertical resistance and a 2D horizontal contribution. Using specific test structures and DC measurements, geometry independent parameters are then extracted. An analytical scalable formula based on Fourier techniques finally...
The operation of rectangular-shaped bipolar tetrode structures as well as the proper evaluation of measured data from such structures are discussed. Based on device simulation, which also serves for verification purposes, guidelines for the layout and for measurement data correction are presented. The application to experimental data is demonstrated.
In medical and automotive applications, device reliability needs to be assessed with great precision. It is therefore mandatory to investigate deeply the extrinsic behavior of memory devices to optimize their operating specifications in order to obtain the best endurance and retention characteristics. In this paper, we describe a new methodology to characterize the extrinsic behaviors of EEPROM devices...
HBM testers are tools for ESD product qualification whereas TLP testers are used for device characterization. The ability to extract TLP-like IV curves from an HBM system is demonstrated in this paper. Together with measurement results on wafer-level, the full methodology is presented and compared to standard 100 ns TLP measurements. The advantage of this methodology is that the quasi-static characteristic...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.