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This paper presents the technology of a new microsystem consisting of a CMOS chip with integrated high voltage electrodes, to be used as a detector for ionizing radiation. Its application ranges from particle detection in nuclear and high-energy physics to X-ray detection for materials research and medical purposes. In this paper, the process integration is detailed and system trade-off considerations...
We have developed a high performance pMOSFET with ALD-TiN/HfO2 gate stacks on (110) substrate using gate last process at low temperature. High work function and low gate leakage current are obtained. An extremely high mobility equivalent to P+poly-Si/SiO2 on (110) substrate (171 cm2/Vs at 0.5 MV/cm) is achieved with ALD-TiN/HfO2 on (110) substrate in the thinner Tinv region of 1.7 nm. Vth roll-off...
A novel and uniform channel program and erase method is presented to replace the FN tunneling operation for SONOS cells in NAND architecture. The proposed operation utilizes substrate transient hot electron (STHE) injection and substrate transient hot hole (STHH) injection for programming and erasing, respectively. Gate bias polarity can control whether hot electrons or hot holes are injected into...
A numerical study of carbon nanotube field effect transistors is presented. To investigate transport phenomena in such devices the non-equilibrium Green's function formalism was employed. Phenomena like tunneling and electron-phonon interactions are rigorously taken into account. The effect of geometrical parameters on the device performance was studied. Our results clearly show that device characteristics...
The paper reports high frequency (HF) performance of carbon nanotube field-effect transistors (CNT-FETs) with S-parameters measurements. The optimized device structure achieves current gain cut-off frequency FT of 1 GHz, with a slope of -20dB/decade, for the first time
A novel vertical channel nonvolatile memory cell with oxide-nitride-oxide-nitride-oxide (ONONO, dual nitride trapping layers) dielectrics stack is proposed and experimentally demonstrated for the first time. Compared with the conventional planar NROM cell, since the cell area of the proposed vertical structure is independent of the gate length, the VDNROM structure can relax the limitation of the...
The interest in carbon nanotubes (CNTs) for electronic applications is predominantly based on the outstanding properties of single walled CNTs, which include ballistic transport and high thermal conductivity. However, there is a need to avoid the standard metal catalysts used for CNT growth, which act as "lifetime killers" for silicon devices. Here the authors present a Ge catalyst growth...
On-chip RF integrated inductors with Ni0.4Zn0.4 Cu0.2Fe2O4 and Y2.8Bi 0.2Fe5O12 ferrite thin-films have been fabricated using IC compatible processes. The ferrite thin-films prepared by spin-coated method show good magnetic performance for RF inductor applications. The high-frequency characteristics of inductor samples are tested, compared and analyzed using the equivalent circuit, with the data of...
Lateral asymmetric MOSFET, which has longitudinal doping variation in the channel, is the core of high voltage MOSFET. Recently it has been recognized that capacitance property of this kind of device is fundamentally different from conventional MOST because Ward-Dutton (WD) charge partitioning is not applicable to this kind of devices (Aarts, 2006). In this work we show the existence of a partitioning...
In this paper, the authors study experimentally and numerically the Schottky barrier height (SBH) lowering of Pt silicide/n-Si diodes and its implications to Schottky-barrier (SB) source/drain p-FETs. The authors demonstrate that hole SBH can be lowered through an image-force mechanism by increasing the n-Si substrate doping, which leads to a substantial gain of the drive current in the long-channel...
For the first time, we report on the beneficial result for minimizing the activation thermal budget using LASER anneals with metal-oxide-gate-electrode/high-k dielectric MOSFETs. With LASER activation, EOT for PMOS conductive metal-oxide gated devices is reduced 4-5Aring compared to conventional RTP activation methods leading to more aggressive ultimate CMOS scaling when using a conductive metal-oxide...
Deep level manganese doping by ion implantation and rapid thermal annealing have been used for the first time to make very high resistivity Czochralski silicon substrates up to 10 kOmegacm and on the average, this is nearly a ten-fold increase over the resistivity of the undoped starting wafer. The material is ideally suited for making semi-insulating silicon handle wafers for radio frequency silicon...
This paper presents dielectric absorption measurements of a MIM capacitor between 100Hz and 10GHz over a broad temperature range. The activation energy of the dielectric absorption is extracted and a new model, taking the temperature dependency of the dielectric absorption into account, is presented. Finally the impact of the temperature dependent dielectric absorption on the MIM capacitors RF performance...
Based on the statistical 3D device simulation of well scaled 25, 18 and 13nm physical gate length bulk MOSFETs, the impact of random dopant fluctuation on 6-T SRAM is studied in detail. The bias control approach is introduced to improve the scalability of bulk CMOS SRAM. Simulation results indicate that at 13nm physical gate length, bulk CMOS SRAM will face fundamental challenges arising from intrinsic...
An analysis of a novel electrically programmable element called an "active fuse" is presented. The device was manufactured in a 65nm CMOS SOI technology. The active fuse is implemented in the SOI silicon film and thus, unlike conventional polysilicon (poly) fuses, remains CMOS compatible with future gate stack materials. The authors show that an active fuse has electrical properties very...
New ZrO2/Al2O3/ZrO2 (ZAZ) dielectric film was successfully developed for DRAM capacitor dielectrics of 60nm and below technologies. ZAZ dielectric film grown by ALD has a mixture structure of crystalline phase ZrO2 and amorphous phase Al2O3 in order to optimize dielectric properties. ZAZ TIT capacitor showed small Tox.eq of 8.5 Aring and low leakage current density of 0.35fA/cell, which meet leakage...
This paper presents for the first time the extraction of chemical vapor deposition (CVD)-TiN and poly-Si work functions on atomic layer deposition (ALD)-HfO2 and high temperature SiO2 (HTO) for a wide range of EOT values. The measurements were performed on bevel oxide structures. Our results reveal that the work functions of both TiN and poly-Si gates highly depend on the underlying dielectrics especially...
Long channel Ge FETs and capacitors with CeO2/HfO2 /TiN gates were fabricated by photolithography and gate wet etch. Rare earth CeO2 in direct contact with Ge was used as a passivating layer producing lowest Dit values in the mid 10 11 eV-1cm2 range. HfO2 cap reduces leakage and improves equivalent oxide thickness scaling of the whole gate stack. The p-FETs show exceptionally high ION/I OFF ratio...
A novel SiGe-S/D structure for high performance pMOSFET called two-step recessed SiGe -source/drain (S/D) is developed with careful optimization of recessed SiGe-S/D structure. With this method, hole mobility, short channel effect and S/D resistance in pMOSFET are improved comparing with conventional recessed SiGe-S/D structure. To enhance device performance such as drain current drivability, SiGe...
Field effect transistors (FETs) built with non-crystalline semiconductors, such as amorphous hydrogenated silicon (a-Si:H) and organic thin film transistors (TFTs) are of immense interest in the development of large area sensor and display systems (Powell, 1989). However, these FETs have a time variant threshold voltage due to bulk and interfacial charge trapping, and hence, to-date these devices...
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