The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Antibody/antigen concept biological sensors as presented in D. Diamond (1998) have shown a very impressive growth in the last decade due to their high selectivity to specific biomolecules. They can allow fast and early detection of various kinds of illnesses and infections. One of the main challenges in this field is to develop biosensors that can be easily inserted within the human body and act as...
The leakage current in electrically stressed MOS structures with ultrathin lanthanum oxide (La2O3) films was investigated. The samples were obtained by the electron-beam evaporation technique and annealed in-situ in ultra-high vacuum conditions. We show that the application of successive voltage ramps leads to a set of current-voltage (I-V) characteristics that can be simulated using a power-law model...
The inductance of the on-die interconnection lines may cause voltage resonant effects under electrostatic discharge (ESD) stress. The phase difference of the resonating oscillations along different ESD current flow paths creates a significant local momentary voltage. Information on this inductance enables designers to take into consideration these voltage resonant effects in ESD protection design
In this work, the investigation of block oxide used in planar MOSFETs has been studied. To solve these above issues and for the comparison, we propose two novel device architectures; one is called the FDSOI with block oxide (bFDSOI) and the other is called the Si on partial insulator with block oxide field-effect transistor (bSPIFET)
Complex ESD failure mechanisms have been found in the interface circuits of an IC product with multiple separated power domains. The MM ESD robustness can not achieve 150 V in this IC product with separated power domains, although it has the 2-kV HBM ESD robustness. The ND-mode MM ESD currents were discharged by circuitous current paths through interface circuits to cause the gate oxide damage, junction...
We presented a transient electro-thermal analysis with STAP considering self-heating. Thermo-mechanical simulators, e.g. FEDOS, are coupled to provide appropriated input data for electromigration analysis to obtain predictive results. The presented electro-thermal results depict the high temperature gradients close to heat sources and heat sinks. Further regions of high risk of electromigration are...
In the event of leakage failures in plastic ball grid array packages (PBGA), standard failure analysis procedure includes acid etching (called decapsulation) of the mold compound to expose the die. Those that are recovering after decapsulation were just closed as a random event caused by a foreign material (FM) in the mold compound. The need to determine the actual defect, which was suspected to have...
This paper described how to use conductive atomic force microscope (C-AFM) and scanning capacitance microscope (SCM) alternately to catch very tiny and cunning defect modes hidden in the indiscernible corner. These schemes are easily implemented with standard equipment already present in most failure analysis laboratories, and could overcome some encountered judge problems
Especially in the handheld context, we need always greater guarantees in product efficiency. Mobiles, notebooks, organizers, cameras etc. are assets whose use increases the probability of downfall. When an electronic product drops on the ground, impact force and deformation is transferred internally to the printed circuit board (PCB), solder joints and the integrated circuits (IC) packages. The IC...
End customer in circuit test rejects at a rate of 2-5% was sent back to manufacturer for analysis and inspection. Electrical failure analysis had revealed some leakage on particular pin not included in the production test program. Physical failure analysis on those parts revealed micro-crack on affected pins. The micro cracks were found to be within the bonding vicinity and shown to have been propagating...
Semiconductor optical amplifiers (SOAs) appear as key components for many applications for future optical networks and telecommunication systems due to various technological schemes that can be selected according to the targeted functions and performances (Eliseev, 1995). New qualification methodologies are now proposed to face the optoelectronic industry modifications and provide end-users with relevant...
In this paper, inter layer dielectric characteristic ramped voltage breakdown (VBD) performance of multiplayer Cu/SiOC interconnect was studied. The results showed that the breakdown reliability is highly process-related. Some dominating factors, such as via etching process, integration scheme used and Cu/dielectric interface etc., were discussed and proposed to improve breakdown reliability performance
In this study, we propose a LSC technique that using SiN capping layer deposition with high mechanical stress on single poly-Si gate. In addition, nMOSFETs with thicker poly-Si gate (220 nm) can also increase tensile strain in the channel region compared to that of the thinner (150nm) poly-Si gate structure. Furthermore, size dependence of nMOSFETs with SiN capping layer is also studied and compared...
Two phases during the P/E cycling of 0.18mum SONOS are observed using a combined charge pumping method to extract the trapped charge distribution: holes accumulation at the initial term, and electrons accumulation after long term cycling. Better endurance characteristic is obtained through optimization to P/E condition and process technology
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.