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In this work, we investigate the effects of oxidation temperature and annealing on Ge movement, and amorphization as an undesirable consequence of inappropriate lowering of temperature during Ge condensation. Possible mechanisms, solutions and implications are presented and it is shown that SiGe with up to 60% Ge can be obtained with oxidation and annealing at a high temperature of 1050degC
This paper presents reliability investigations in NLDEMOS transistor in 0.13μm SOI CMOS technology. Reliability tests under hot carrier injections (HCI) for different gate-lengths show two different degradation mechanisms. The modification of current path with short overlap (Olap) due to oblique equi-potential lines and the increase in the vertical electrical field under the gate edge at low V g lead...
The adoption of SOI structure into 90 nm IC devices makes the characterization very challenging. TEM characterization becomes more critical, challenging and indispensable in the failure analysis of such devices. To illustrate the application of TEM in this area, several unique examples including both cross-sectional and planar analysis are given here
In this paper, a case study of BIST failure in SOI wafer fabrication was presented. With optimized charge neutralization using a well-controlled normal incident electron beam, a reliable depth distribution of K in the ILD was obtained which is helpful to understand the source of K contamination. From the SIMS and EDX results, the root cause was concluded to be K contamination introduced by the CMP...
In this work, the investigation of block oxide used in planar MOSFETs has been studied. To solve these above issues and for the comparison, we propose two novel device architectures; one is called the FDSOI with block oxide (bFDSOI) and the other is called the Si on partial insulator with block oxide field-effect transistor (bSPIFET)
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