Wireless sensor networks (WSNs) are an integral part of the emerging Internet of Things. These wireless sensor networks are made up of small, isolated wireless sensor nodes that operate either on battery or on energy harvesting systems. Due to this, the energy budget of these nodes is limited. Hence, the energy consumption of these nodes must be minimized in order to prolong their battery life. Reducing the energy consumption of the digital pre-processing block of these wireless sensor nodes is a method that can be used to minimize the total energy consumption of these nodes. Dynamic Voltage and Frequency Scaling (DVFS) is a technique that is proven to effectively decrease the energy consumption of large digital systems. This project applied DVFS on the pre-processing block of wireless sensor nodes in order to quantify the trade-off between the energy overhead of implementing a DVFS system, and the energy savings of the pre-processing block. A DVFS system which is made up of a variable clock source and a variable power supply was applied on a processor in order to simulate energy consumption and energy reduction. It was shown that there is a significant trade-off between the energy consumption of the DVFS system and the energy savings of a small-scale processor.