Delay is the time taken by the electrical signal to reach from the transmitter to the receiver. If the delays of interconnects are not controlled properly, it may lead to significant error like serious clock skew in high-speed digital systems. Thus delay extraction is important for the performance of sequential control. In this paper, an improved algorithm for delay extraction is proposed. The algorithm is based on the Hilbert transform of tabulated data and has significant performance in various structures, such as vias, couple lines and serpentine design. Results from circuit simulators show that this method is simple and efficient.