Outsourcing of IC fabrication has increased the potential for altering the genuine design with the insertion of concealed circuits (hardware Trojans). A methodology for detecting hardware Trojans (HTs) that has been pursued recently is based on comparing the power and delay response of a genuine chip to the manufactured chip/device under test (DUT). However, the probability of detecting the HT remains small in many cases due to the low probability of activating the concealed circuits. This paper proposes a technique to increase HT activity during testing by inserting probability increase circuits (PICs) at critical points in the design. Preliminary results for a standard HT example show a reduction in time for HT activation of over 95% with modest increases in power, size, and delay overhead.