A novel sinusoidal VCO using six digital CMOS inverters is presented in this paper. Simulation with BSIM3V3 parameters of a typical CMOS 0.35 mum process indicates oscillations from 1.28 GHz to 1.46 GHz. Using two additional capacitances about 300 fF, the corresponding frequency range is 491 MHz-562 MHz. The equivalent total power consumption in both cases is lower than llmW. For 1.4 GHz oscillation, the simulated phase noise at DeltaF=1 MHz is lower than -94 dBc/Hz. The proposed circuit operation has been acted from measurements with the commercial HEF4069UBP from Philips semiconductors [1].