Our group identified defects in a limited subset of generally low performance 6H and 4H SiC MOSFETs with electrically detected magnetic resonance (EDMR) (M.S. Dautrich et al., 2006),(D.J. Meyer et al., 2005). That work demonstrated the potential of EDMR for studies of SiC MOSFETs and established that both interface dangling bonds and vacancy centers which extend into the SiC "bulk" can contribute to the widely reported performance limitations of these devices. (Another group studying porous SiC has utilized conventional electron spin resonance (ESR) to study SiC/Si02 interface trapping centers (J.L. Cantin et al., 2004)). In this study, we utilize improved sensitivity EDMR to compare performance limiting defects in a fairly wide variety of SiC MOSFETs prepared under much more technologically relevant processing conditions. Our study involves four sets of 4H SiC lateral MOSFETs with a gate thickness of 500 A. All of these devices received a standard dry-wet thermal gate oxide growth. In some devices, the oxide growth was followed by an NO anneal. Some devices had an "as-grown" epitaxial layer, others an implanted epitaxial layer.