In this work, we present for the first time experimental evidence for the reduced gate tunneling current density in narrow FinFET structures compared to quasi-planar very wide-fin structures. This reduction is observed for both nand p-channel and is found to be larger for HfO2 than for SiON. For a given gate dielectric, the above reduction depends on the fin width. For SiON with an equivalent oxide thickness of 1.8 nm in undoped n-channel devices, it varies from factor of 2.1 to 5.2, when the fin width decreases from 80 to 20 nm