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In the present study the electrical properties of 100nm and 400nm alumina films grown by the atomic layer deposition technique on p-type Si before and after a post-deposition annealing at 440°C and after a dc H plasma treatment at different temperatures are investigated. We show that the density of interface states is below 2×1010cm−2 in these samples and this value is significantly lower compared...
The presence of capping materials during annealing (activation for example) can substantially impact the silicon junction profiles of Complementary Metal Oxide Semiconductor Field Effect Transistors (CMOSFET), depending on the nature of these layers. In this paper we specifically investigated the boron out-diffusion from a silicon junction into the silicon oxide in presence of a silicon oxide/silicon...
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