The high hole mobility of Ge makes it a strong candidate for replacing Si in future generation of CMOS technology. The Ge/GeO 2 /Al 2 O 3 offers one of the lowest interface states, but there is little information available on its reliability. For Si pMOSFETs, NBTI limits their lifetime and hole traps in gate dielectric play a major role in NBTI. The objective of this work is to investigate the hole traps of Ge/GeO 2 /Al 2 O 3 structure. Wherever possible, the Si/SiON or Si/SiON/High-k will be used as a benchmark. It is found that hole trapping and NBTI is substantial and the threshold voltage shift can be close to 1V for Ge/GeO 2 /Al 2 O 3 . A new model has been proposed to explain the charging and discharging behavior of hole traps. Unlike Si sample, the energy level of hole traps rises after charging and lowers after neutralization for Ge sample.