-
[1] ISCAS benchmark home page. http://www.cerc.utexas.edu/itc99-benchmarks/bench.html.
-
[2] J. Boucaron, J. Millo, and R. de Simone. Formal methods of scheduling for latency-insensitive designs. EURASIP journal on Embedded Systems, 2006.
-
[3] F. R. Boyer, E. M. Aboulhamid, Y. Savaria, and M. Boyer. Optimal design of synchronous circuits using software pipelining techniques. ACM Trans. Design Autom. Electr. Syst., 6(4):516-532, 2001.
-
[4] J. Campos and M. Silva. Structural Techniques and Performance Bounds of Stochastic Petri Net Models. In Advances in Petri Nets 1992, volume 609 of LNCS. Springer, 1992.
-
[5] L. Carloni, K. McMillan, and A. Sangiovanni-Vincentelli. Theory of latency-insensitive design. IEEE Transactions on Computer-Aided Design, 20(9):1059-1076, Sept. 2001.
-
[6] L. P. Carloni and A. L. Sangiovanni-Vincentelli. Performance analysis and optimization of latency insensitive systems. In Proc. ACM/IEEE Design Automation Conference, pages 361-367, June 2000.
-
[7] J. Carmona, J. Cortadella, M. Kishinevsky, and A. Taubin. Elastic circuits. IEEE Transactions on Computer-Aided Design, 28(10):1437-1455, Oct. 2009.
-
[8] J. Carmona, J. J´ulvez, J. Cortadella, and M. Kishinevsky. Scheduling synchronous elastic design. In 9th International Conference on Application of Concurrency to System Design (ACSD 2009), pages 52-59, 2009.
-
[9] M. Casu and L. Macchiarulo. A new approach to latency insensitive design. In Proc. Digital Automation Conference (DAC), pages 576-581, June 2004.
-
[10] T. H. Cormen, C. Stein, R. L. Rivest, and C. E. Leiserson. Introduction to Algorithms. McGraw-Hill Higher Education, 2001.