Fundamenta Informaticae > 2011 > Vol. 108, nr 1/2 > 1-21
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journal ISSN : | 0169-2968 |
journal e-ISSN : | 1875-8681 |
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Bibliography
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[1] ISCAS benchmark home page. http://www.cerc.utexas.edu/itc99-benchmarks/bench.html.
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[2] J. Boucaron, J. Millo, and R. de Simone. Formal methods of scheduling for latency-insensitive designs. EURASIP journal on Embedded Systems, 2006.
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[3] F. R. Boyer, E. M. Aboulhamid, Y. Savaria, and M. Boyer. Optimal design of synchronous circuits using software pipelining techniques. ACM Trans. Design Autom. Electr. Syst., 6(4):516-532, 2001.