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In this letter, we report the heterogeneous integration of vertically aligned silicon (Si) microprobe arrays/(111) with MOSFET circuits/(100) by IC processes and subsequent selective vapor-liquid-solid (VLS) growth of Si. A hybrid Si-on-insulator (SOI) substrate with different species of Si layers, e.g., a (100)-top-Si/buried oxide/(111)-handle-Si system, was utilized for the heterogeneous integration...
This paper describes the requirements and practical methods for on-chip built-in self-test (BIST) for high-frequency circuits and systems, considering input signal generation, measurement methods, and decision-making methods. Selected case studies in BIST designs for RF low-noise amplifiers and PLL jitter testing will be presented, with a focus on time-domain digital implementations for robustness...
We have proposed a growth technique of various lengths, 2-4 mum diameter, conductive-silicon micowire arrays, by repeated vapor-liquid-solid (VLS) growth of n-type silicon, using Au as the growth catalyst and a mixture gas of 1% PH3 with 100% Si2H6 as the silicon gas source. We obtained a longer 100 mum-length silicon wire by both the first growth of 50 mum-length wire and an additional growth of...
Vapor-liquid-solid (VLS) growth, using Si2H6 as the gas source of Si, can be used to realize intrinsic Si microprobe arrays, which could be doped by diffusion process (at 1100degC) after VLS growth. But in this work we have demonstrated that by incorporating in-situ doping using the gas source of Si2H6 and PH3 with VLS growth process, doped n-Si microprobes can be realized directly at a temperature...
Total jitter measurement has been ready to perform jitter testing of HSIO integrated SoCs in an HV production testing environment. Since it requires no special loadboard nor additional hardware or instrumentation, it provides a cost-effective total jitter test solution for HV production testing.
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