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This is the first published study of the reliability of thyristor-based high-speed memories. The T-RAM (thyristor-based random access memory) was characterized using test structures and multi-megabit product die fabricated in a 130 nm SOI logic technology. The reliability lifetime of a nominal bit was investigated by subjecting TCCT devices (thin capacitively coupled thyristor) to a DC current stress...
In this paper, methods for achieving a manufacturable TCCT on SOI with excellent thermal stability and fast switching speed are reported for the first time. A carrier lifetime adjustment process was implemented and indium was used as a p-type dopant. By using these methods, we demonstrate a TCCT device with stable forward breakover voltage (Vfb) at 125degC and bipolar gain with significantly improved...
A capacitor-less DRAM cell using a thin capacitively-coupled thyristor (TCCT DRAM) is introduced. Experimental results from unit memory cell fabricated in a 130nm SOI logic technology demonstrate Ion/Ioff ratio of 107, non-destructive read; write speed less than 2ns at 125C, and solid retention characteristics. These cell characteristics combined with a small cell area (as low as 9F2) and simple process...
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