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Channel thickness Tch dependence of electron mobility μκρρ in thin In0.53Ga0.47As channels was investigated at temperatures T from 35 to 300 K using conventional parametric and pulsed ID-measurements, including a novel technique with time resolution down to 10 ns. It is show that accurate mobility measurements can be obtained using low T and/or fast pulsed measurements, thus avoiding significant underestimations...
We report the fabrication of short-channel FinFETs on InGaAs-on-silicon wafers using the aspect ratio trapping (ART) technique. We demonstrate excellent short-channel control down to 20 nm gate length due to scaled fin width down to 9 nm and reduction of parasitic bipolar effect (PBE). PBE that plagues III-V NFETs with gate-all-around (GAA) or III-V-on-insulator (III-V-OI) structures can be significantly...
We demonstrate self-aligned fully-depleted III-V MOSFETs using CMOS-compatible device structures and manufacturable process flows. Processes with good manufacturability and scalability, such as, gate definition and spacer formation using RIE, and formation of self-aligned source/drain extensions (SDE) and self-aligned raised source/drain (RSD), have been established on III-Vs. We demonstrate short-channel...
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