The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
22nm node Si SOI Coplanar “N Channel Vertical Dual Carrier Field Effect Transistors” (VDCFET) and its SOC with effective channel length less than 10nm for communication applications are presented.
32 nm Si and Si1-xGex SOI Coplanar N Channel Vertical Dual Carrier Field Effect Transistors for mixed signal and communication applications are presented.
With the announcement of Intel and IBM to provide 45 nm CPUs, the semiconductor industry has been engaged in the research and development work of 32 nm node CMOS technology. In this paper, we present our development work on the design theory and fabrication process integration of 32 nm node Ge, Si and Si1-xGex "vertical dual carrier field effect transistor" (VDCFET) ASIC for switching and...
Device physics and design theory of Si, Ge, and Si1-xGe x "complementary vertical dual carrier field effect transistor" (CVDCFET) integrated circuits on insulator for high speed switching and high frequency mixed signal application are studied and compared. The transistor scaling projections of CVDCFET are presented and compared with the scaling projections of CMOS as given in the 2005 edition...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.