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This paper briefly analyses the noise, bandwidth and linearity performance advantage of nanometer CMOS current-mode circuits compared to their voltage-mode counterparts and proposes a new current-mode receiver front-end targeting low-power wideband wireless applications. The proposed 65nm CMOS current-mode receiver front-end comprises a current-mode LNA, and passive mixers, and covers all WiMAX/LTE...
This paper presents a wideband, direct-conversion radio receiver front-end that targets all WiMAX/WLAN bands from 2.3-GHz to 5.8-GHz. The receiver front-end is fabricated in 0.18-μm CMOS and achieves a gain of 25 dB, noise figure of 6 dB, and IIP3 of -6 dBm while dissipating 28 mW from a 1.8-V power supply. This performance is achieved while using only two integrated inductors.
The IIP2 requirement in fully integrated direct-conversion receivers using FDD duplexing is prohibitively high and demands the use of an external filter in order to attenuate the leakage from the transmitter. This paper presents a digital calibration technique for passive CMOS down-converters that allows a direct conversion receiver achieve the requirements without external filtering. A Least-Mean-Square...
In this paper a low-power design of an integrated RF receiver for Wireless Sensor Networks (WSNs) in 90 nm CMOS technology is proposed. The receiver is IEEE 802.15.4 physical specifications compliant. It is designed to operate in ISM band at 2.45 GHz center frequency. Target devices for this kind of transceiver are low-cost battery powered smart embedded devices and sensors. The receiver is designed...
This paper presents the design challenges and solutions for 4 G nanometer radio receivers for mobile devices. The specifications for the ZERO-IF/LOW-IF 4 G receiver architecture are derived. Limitations due to the use of low-voltage nanometer technologies are described and novel circuit technique mobile systems, such as wideband noise reduction, inductor-less peaking, passive mixing, and low flicker...
RFIC design using low-voltage nanometer CMOS technologies offers both advantages and challenges. This paper describes the limitations of using these technologies in receiver front-end design and proposes circuit solutions. Several techniques such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are reviewed and employed. A receiver front-end that...
A new method to enhance the IIP2 of a double-balanced Gilbert cell mixer through digital calibration is presented. The IIP2 calibration method consists of offset voltage cancellation in the switching pairs. The effectiveness of the method has been proven by calibrating a 0.18 mum CMOS mixer at several combinations of worst-case mismatch conditions and corners. It has been found that the calibrated...
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