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An exponentially-scaling C-2C switched-capacitor ladder is proposed for mm-Wave DCOs to achieve high frequency resolution with small chip area. The 65nm-CMOS DCO prototype measures frequency resolution of 4Hz over a frequency range from 54.79 to 63.16GHz with phase noise of −90.7∼−94.1dBc/Hz at 1MHz frequency offset while consuming 18mW, corresponding to FOMT from −176.6 to −180 dBc/Hz. The DCO occupies...
To support 16-QAM modulation in E-band applications, phase-locked loops (PLLs) are required to have wide a frequency tuning range from 71 to 86GHz and low phase noise of −90dBc/Hz @1MHz [1], which are still very challenging even with aggressive CMOS scaling [2]. Another issue associated with PLLs is the difficulty to integrate on-chip loop filters. Active loop filters are employed to scale down the...
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