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This paper presents one fabrication process of a triple-layer stacked TSV interposer for switch matrix consisting of eight RF chips. There are about 600 TSVs in the interposer and the diameter of TSV is 40um with the aspect ratio being 4:1. The whole area of the interposer is 13.5 mm × 7.5mm and the thickness of the triple-layer stacked interposer is only about 0.7mm. After the process, the electrical...
As the pitch of TSVs shrinks down, electrical characteristics of TSV become more complicated and mechanical stress becomes a critical issue. The objective of this paper is to study the electrical and mechanical characteristics of fine pitch TSV. The features are that the fine pitch TSV samples are fabricated with self-integrated micro heater and thermocouple, which are integrated to act as the hot...
In this paper, a novel Si interposer for hermetical MEMS oriented System-in-Package application is presented and it is a low stress, scalable platform with a stress releasing function. It's composed of Si posts which are Air-gapped from Si interposer substituting traditional Copper TSVs to function as electrical interconnection paths, re-distribution layer (RDL) and landing pads for chip stacking...
Through silicon via (TSV) technology is moving in the direction of miniaturization and multi-functional development, and is considered to be the main way beyond Moore's Law. This paper presents a fine-pitch TSV manufacturing method with self-aligned backside insulation layer opening for three-dimensional (3D) integration. It is characterized by the use of chemical-mechanical polished (CMP) process...
In this study, suspended graphene clamp-clamp beam (SGCCB) as long as 100 µm was manufactured by FIB cutting. Large-scale graphene film was grown on Cu foil by CVD and transferred to DRIE defined silicon substrate. The influence of FIB cutting time and ion beam intensity on the pattern profile were investigated with an optimized processing recipe. The SGCCBs revealed a sharp edge, which can be used...
In this study, a stacked SRAM module with a built-in decoder was proposed with a through-multilayer TSV integration process. The through-multilayer TSVs provided data passages for all common signals, including the address bus, data bus, power, read and write control, which were redistributed at each individual chip, while the chip select signals were connected separately to the built-in decoder. Regarding...
The bulk titanium deep reactive ion etching (DRIE) enabled high aspect ratio structures and devices are promising for harsh and in vivo environments applications. An etching model is necessary for better profile control to acquire needed performance, in which a correct ion angular distribution (IAD) in chlorine plasma is crucial. In this paper, an overhang SU-8 structure is proposed to experimentally...
In this paper, a novel 3D integration process named Via-Backside-Release process, abbreviated as VBR process, is proposed and technical issues are addressed. With VBR process, there's no need of removal process of copper overburden due to the filling of TSV by copper electroplating, and no individual unit process for producing Cu/Sn microbumps. In order to verify the feasibility of VBR process, a...
In this paper, a monolithic integration structure with TSV interconnections is introduced for un-cooled infrared FPA to do easy wafer-level-package. Firstly, the challenging process for making the structure will be reviewed and identified. And then process sequence for making the TSV interconnections and RDLs and CMOS compatible surface process for IR FPA will be developed. In the end, a WLP scheme...
TSV interposer provides a cost efficient solution way for 3D IC integration. In this paper, a TSV interposer technology is proposed for SRAM stacking. A simple fabrication process is developed for cost-sensitive application. The mushroomlike Cu/Sn bumps by copper overburden can be directly connected with other substrate, which eliminates a CMP planarization to improve the yield and reduce fabrication...
In this study, isotropic wet etching technology has been developed to achieve the pyramidal needle structures on one side polished chemical pure titanium substrate. Different etchants, mask materials and substrate materials combinations were investigated respectively for process optimization. A steady etch rate in excess of 2 mum/min has been achieved with sputtered Ni mask. For the first time, bulk...
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