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In this paper, we investigate resource allocation in the OFDMA cooperative networks with Best effort (BE) services and Real time (RT) services. Both Amplify-and-forward (AF) and Decode-and-forward (DF) schemes are considered adaptively in the two-hop relay transmission. We resolve the relay node, relay strategy selection combined subcarrier and power allocation in mixed services resource allocation...
Advanced CMOS technologies have demonstrated reduced sensitivity to radiation total-ionization-dose (TID) effect. However, the reduced device dimensions can significantly increase the circuit sensitivity to transient radiation effects. This paper presents a radiation-tolerant ring oscillator Phase-Locked Loop (PLL) designed in a commercial 0.13 µm CMOS process. The PLL is designed for radiation-tolerant...
Resource-constrained is a critical issue in Wireless Sensor Networks (WSN) applications. Data aggregation (or data fusion) is one of the key techniques to solve the problem. Data aggregation can effectively reduce the data traffic, thereby reduce energy consumption, and extend the network's survival time. The research of data aggregation relates to many aspects of technology, so that the design of...
A third-order CT ΔΣ ADC that replaces the multi-bit quantizer and feedback DAC by a pulsewidth modulation (PWM) generator and time-to-digital converter (TDC) is implemented in 65 nm CMOS technology. The TDC provides a 50-level binary output code and a time-quantized feedback pulse to the modulator. It is shown that the TDC can achieve 11 bit linearity in time steps without calibration...
Vehicle-to-vehicle communication among vehicular ad hoc networks (VANETs) plays an important role in providing a high level of safety and convenience to drivers. Geographic routing protocol has been identified to be suitable for VANETs because of the special nature of such networks, e.g., frequently changed network topology and high dynamic mobility. There is considerable functional research about...
A novel Built-In-Self-Test (BIST) approach is present in this paper to test the clock manager DLL of system-on-chip (SoC). The whole approach is divided into two steps. Firstly, test a single DLL which will be used as the benchmark in step two by introducing a test clock which is the jitter embodiment of the reference clock. The proposed method with a view to test the reference clock jitter tolerance...
This paper addresses the problem of providing congestion-management for a shared wireless sensor network- based target tracking system. In many large-scale wireless sensor network target tracking scenarios (e.g., a surveillance system for tracking vehicles in urban environments), multiple targets may converge within close proximity of each other. Such scenarios may cause network congestion as nearby...
A novel configurable no dead-zone digital phase detector is proposed in this paper. As an embedded SRAM is employed to store configuration data, detection sensitivity of the phase detector can be controlled by the configuration data according to different input frequency. Besides, the novel phase detector avoid dead-zone by adopting two flip-flops and generating three state during operation. The circuit...
This paper describes initial research in addressing the challenges of managing quality of information for wireless sensor network target tracking with multiple missions of various priorities tracking multiple targets. We address the use of a distributed market-based mechanism to equalize the information value loss (that itself is a function of quality of information (QoI)) of tracked targets across...
A novel configurable frequency synthesizer based on delay-locked-loop (DLL) is presented in this paper, with maximum multiplication factor 10 and maximum division factor 16. A SRAM is employed to store configuration data for different multiplication and division factor. Users only need to change the data stored in the embedded SRAM to obtain frequency needed. The output frequency range is from 25...
As an innovative distributed computing technique for sharing the memory resources in high-speed network, RAM Grid exploits the distributed free nodes, and provides remote memory for the nodes which are short of memory. One of the RAM Grid systems named DRACO, tries to provide cooperative caching to improve the performance of the user node which has mass disk I/O but lacks local memory. However, the...
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