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Heat dissipation becomes one of the most serious challenges in three dimensional integrated circuits (3D ICs) designs. The through-silicon vias (TSVs) are effective on improving the thermal conductivity of 3D ICs. Many previous works have proposed thermal model for 3D ICs with TSVs, and formulated the TSV planning as a convex programming problem. On the other hand, besides excellent electrical and...
A floorplanning algorithm for novel carbon nanotube based three-dimensional integrated circuits is proposed. It is based on ant colony algorithm. The proposed algorithm can optimize the area and area-delay for the single device layer in the three-dimensional integrated circuits, and then optimize the whole 3D IC's area and delay. After the optimization, the performance can improve about 15%.
In this paper, we present an advanced placement which aims at both flattening the temperature and decreasing the area in SoC floorplanning. The placement process is ingeniously converted into a quasi TSP problem and is solved by ant colony optimization (ACO) algorithm. Compared to traditional algorithms based on O-tree and B*-tree optimization, our results show great improvement in calculating speed...
Multi-threshold CMOS is a valuable leakage reduction method in circuit standby mode. Reducing leakage current through fine-grain sleep transistor insertion (FGSTI) makes it easier to guarantee circuit functionality and improves circuit noise margins. In this paper, we first indicate the negligible dependence of ST size on the amount of leakage saving which makes the two-phase FGSTI reasonable based...
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