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Heat dissipation becomes one of the most serious challenges in three dimensional integrated circuits (3D ICs) designs. The through-silicon vias (TSVs) are effective on improving the thermal conductivity of 3D ICs. Many previous works have proposed thermal model for 3D ICs with TSVs, and formulated the TSV planning as a convex programming problem. On the other hand, besides excellent electrical and...
A floorplanning algorithm for novel carbon nanotube based three-dimensional integrated circuits is proposed. It is based on ant colony algorithm. The proposed algorithm can optimize the area and area-delay for the single device layer in the three-dimensional integrated circuits, and then optimize the whole 3D IC's area and delay. After the optimization, the performance can improve about 15%.
Bundles of carbon nanotubes (CNTs) have been proposed as a promising replacement for copper interconnect due to their large conductivity and current-carrying capabilities. However, large resistance caused by imperfect metal contacts appears to be a significant problem in short CNT interconnects. Taking advantages of both CNT and copper becomes a good choice in ASIC. In this paper, an effective partition...
In this paper, we propose a statistical model to analyze the crosstalk noise induced by process variations on single-walled carbon nanotube (SWCNT). Our approach is based on a closed-form metric, which simplifies the noise peak voltage of SWCNT buses into a linear function of process variations. The methodology is based on an assumption that if the variational parameters are independent Gaussian variables,...
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