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Negative bias temperature instability (NBTI) has come to the forefront of critical reliability phenomena in advanced CMOS technology. In this paper, we propose a fast and accurate PMOS NBTI model, in which the temperature variation and the ratio of active to standby time are considered in both stress and relaxation phases. A PMOS Vth degradation model and a digital circuits' temporal performance degradation...
The estimation and optimization of leakage power become more and more important with technology scalling. Besides subthreshold and gate leakage, the band-to-band (BTBT) junction leakage plays a significant role in total leakage and thus accurate estimation is one of the most important missions in circuit simulation. Today, the current leakage estimating models are still not accurate enough or slow...
A novel SOI high voltage device with compound dielectric buried layer (CDL SOI) and its analytical model is proposed. The vertical electric field of buried layer is enhanced due to the low k (permittivity) of dielectric layer and the electric field in the drift region is modulated by the compound dielectric layer with different k, and both increases breakdown voltage of device. The electric field...
A new high voltage 4H-SiC Schottky barrier diode (SBD) structure for monolithic microwave integrated circuit (MMIC) applications is proposed. It employs one or more floating metal rings (FMRs) which work similar to guard rings. Influence of FMRs structure on the breakdown voltage and cut-off frequencies of the SBD were studied by numerical device modeling. As compared to the one without ring, about...
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