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This paper explores the capability of FPGA solutions to accelerate scientific applications with variable-precision floating-point (VP) arithmetic. First, we present a special-purpose Very Large Instruction Word (VLIW) architecture for VP arithmetic (VV-Processor) on FPGA, which uses unified hardware structure to implement various VP algebraic and transcendental functions. We take exponential and trigonometric...
A reconfigurable Viterbi decoder with high throughput and low complexity is presented in this paper. The proposed Viterbi decoder supports constraint lengths ranging from 3–9, code rates in the range of 1/2–1/3, and arbitrary truncation lengths. The decoder achieves a low bit error ratio in multiple standards, such as GPRS, WiMax, LTE, CDMA, and 3G. The proposed decoder is implemented on Xilinx XC5VLX330...
Many scientific computing applications require efficient variable-precision floating-point arithmetic. This paper presents a special-purpose Variable-Precision Floating-Point Arithmetic Processor (VPFPAP) based on Very Large Instruction Word (VLIW) structure. The proposed processor uses a unified hardware structure, equipped with multiple custom basic variable-precision arithmetic units, to implement...
We propose an efficient multi-access memory architecture for image applications with multiple interested regions. Conflict-free parallel access of randomly aligned rectangular blocks of data in the interested regions is achieved. Only interested regions in the image are transmitted from main memory to a secondary multi-module memory structure proposed in our work, and overlapped data between different...
FPGA chips have become a promising option for accelerating scientific applications, which involve many floating-point transcendental functions, such as sin, log, exp, sqrt and etc. In this paper, we present a 64-bit ANSI/IEEE floating-point CORDIC co-processor on FPGA, providing all known CORDIC functions. And there is no 64-bit CORDIC implementation on FPGA known to us. We propose a hybrid-mode CORDIC...
Floating-point fast Fourier transform (FFT) processor and coordinate rotation digital computer (CORDIC) element play important roles in communication and radar applications. But even with the rapid development of large-scale integrated circuit, it is usually impractical to implement these floating-point computations on FPGA, as they will consume a large amount of chip resources. In this paper, a compact...
Many researchers have been interested in the processor-memory bottleneck problem. Quite a few image applications are only interested in one or more partial regions in the images. This paper proposes an efficient multi-access memory scheme for these image applications with multiple interested regions. A multi-module memory structure is presented between the main memory and the processing units, which...
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