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Negative bias temperature instability in pMOSFETs with thermally and plasma nitrided oxides is investigated using quasi-DC Id-Vg (slow Id-Vg) and on-the-fly interface trap (OFIT) measurement methods. By comparing the OFIT results with those observed from Id-Vg measurements, we found that the threshold voltage shift measured by slow Id-Vg is mainly due to the interface trap since the oxide charge is...
The conventional and the fast pulsed IV measurements are carried out for the extraction of the threshold voltage shift for p-MOSFETs under stress. In addition, the on-the-fly interface trap (OFIT) measurement technique recently developed by our group is applied to the characterization of interface trap generation and recovery. The OFIT data are compared with those obtained using conventional charge...
A generalized reliability model of BTI is presented where it is shown that gate stacks with similar interfacial layer lie on the same NBTI vs. E-field universal curve and those with similar bulk layer lie on the same PBTI vs. E-field universal curve. From these universal curves, an optimal gate stack can be derived for which NBTI=PBTI
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